NoC Interconnect Design Engineer and Architect
$134,500 - $201,700 USD yearly
Originally posted 20 October 2026 by the employer.
About the role
As an ASIC Engineer, you will define, model, design, optimize, verify, validate, implement, and document IP (block/SoC) development for high-performance, low-power products.
What you'll do
- Define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development. - Create architectures, circuit specifications, logic designs, and/or system simulations based on system-level requirements. - Collaborate across teams, including software architecture and hardware architecture, to develop and execute implementation strategies meeting system requirements. - Evaluate aspects of the process flow from high-level design to synthesis, place and route, timing and power use, and verification. - Utilize tools and applications such as RTL to GDS Flow and Virtuoso to execute architecture and design of an individual block/SoC or IC Package. - Write detailed technical documentation for EDA, IP, and ASIC projects.
What you'll need
- Bachelor's degree in Science, Engineering, or a related field with 2+ years of ASIC design, verification, validation, integration, or related work experience; OR Master's degree with 1+ year of related experience; OR a PhD. - Experience with architecture and design tools. - Experience with ASIC design, verification, validation, or integration workflows.
Nice to have
- Master's degree in Electrical/Electronic Engineering, Computer Engineering, or Computer Science. - 3 years of ASIC design, verification, validation, integration, or related work experience. - 2 years of experience with architecture and design tools. - 2 years of experience with scripting tools and programming languages. - 2 years of experience with design verification methods.
Skills: NoC, interconnect, architecture, ASIC, SoC
This role has been open 0 days — well below the 77-day median for SoC/Chip Architecture roles.
SoC/Chip Architecture · SOC Architecture
|
Open roles in category
475
|
Median days open
77 d
|
Median salary
$238k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Qualcomm | All employers we track in this specialty (475 roles · 66 employers) |
|---|---|---|
| Open roles in this specialty | 79 | 475 |
| Open roles in the wider Digital Design & Verification family | 407 | 3283 · 116 employers |
| Median days open | 84 d | 77 d (+7 d vs this employer) |
| Median salary (USD postings) | — | $238k |
Skills observed across this category: NoC, interconnect, architecture, ASIC, SoC
Who's hiring in this category
- Qualcomm (this employer) · 76 open roles · median 87 d
- NVIDIA · 55 open roles · median 70 d
- Apple · 38 open roles · median 13 d
- AMD · 34 open roles · median 63 d
- Arm Holdings · 27 open roles · median 118 d
- Micron Technology · 22 open roles · median 110 d
How we counted: 475 open SoC/Chip Architecture (SOC Architecture) roles from 66 employers tracked in the SemiconductorJobs index, counted 21 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.