Next-Gen, High-Speed HBM, LPDDR Memory Subsystem ASIC Digital Design Engineer (
Digital Design & SoC Architecture
Originally posted 21 September 2026 by the employer.
Design high-speed HBM and LPDDR memory subsystems.
About the role
What you'll do
- Apply ASIC knowledge to assist in defining, modeling, designing, optimizing, verifying, validating, implementing, and documenting IP development.
- Assist in the creation of architectures, circuit specifications, and logic designs based on system-level requirements.
- Collaborate with team members to assist in developing an implementation strategy that meets system requirements.
- Support the evaluation of process flow from high-level design to synthesis, place and route, and timing and power use.
- Utilize tools/applications (e.g., RTL to GDS Flow, Virtuoso) to execute architecture and design of a specific part of a block/SoC.
- Write technical documentation for EDA/IP/ASIC projects.
What you'll need
- Bachelor's degree in Science, Engineering, or a related field.
Nice to have
- Master's degree in Electrical/Electronic Engineering, Computer Engineering, or Computer Science.
- 6 months of experience with architecture and design tools.
- 6 months of experience with scripting tools and programming languages.
- 6 months of experience with design verification methods.
Market context
This role has been open 13 days — well below the 62-day median for Digital/RTL Design roles.
Digital/RTL Design · RTL Design
|
Open roles in category
968
|
Median days open
62 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | Qualcomm | All employers we track in this specialty (968 roles · 101 employers) |
|---|---|---|
| Open roles in this specialty | 139 | 968 |
| Open roles in the wider Digital Design & Verification family | 374 | 3109 · 114 employers |
| Median days open | 59 d | 62 d (−3 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Who's hiring in this category
- Qualcomm (this employer) · 139 open roles · median 59 d
- Synopsys · 68 open roles · median 25 d
- AMD · 64 open roles · median 45 d
- NXP Semiconductors · 47 open roles · median 81 d
- Analog Devices · 45 open roles · median 40 d
- NVIDIA · 45 open roles · median 59 d
How we counted: 968 open Digital/RTL Design (RTL Design) roles from 101 employers tracked in the SemiconductorJobs index, counted 5 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.