New College Grad - HBM SoC Design Engineer/Architect - United States
$79,000 - $175,000 USD yearly
Originally posted 29 September 2026 by the employer.
Contribute to the design, integration, and validation of advanced HBM logic die and memory-centric SoCs.
About the role
This role involves contributing to the design, integration, and validation of advanced HBM logic die and memory-centric SoCs.
What you'll do
- Design, implement, and integrate digital logic and subsystem RTL using Verilog or SystemVerilog for HBM SoC solutions.
- Collaborate with architects and engineering teams to translate functional requirements into microarchitectures, interface definitions, and implementation plans.
- Support design-quality activities including simulation, synthesis, static timing analysis, clock-domain crossing (CDC) analysis, debugging, and design reviews.
- Evaluate power, performance, area, and timing tradeoffs to develop data-driven technical recommendations.
- Develop automation solutions and leverage AI Assisted workflows, Generative AI, Large Language Models (LLMs), or Agentic AI technologies to improve engineering productivity.
What you'll need
- Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field.
- Academic, research, internship, or project experience in digital design, ASIC development, FPGA design, or computer architecture.
- Working knowledge of Verilog, SystemVerilog, VHDL, or another hardware description language.
- Understanding of digital design fundamentals including finite-state machines (FSMs), pipelining, clocking, reset strategies, timing concepts, and synchronous logic.
- Strong analytical, problem-solving, written communication, and verbal communication skills.
Nice to have
- Master's or Ph.D. degree in Electrical Engineering, Computer Engineering, or a related technical discipline.
- Coursework, research, internship, or project experience in SoC design, RTL development, design verification, physical design, or embedded systems.
- Familiarity with synthesis, static timing analysis (STA), simulation, formal verification, UVM, FPGA prototyping, or industry-standard EDA tools.
- Understanding of memory systems and high-speed interfaces such as HBM, DDR, LPDDR, PCIe, or CXL.
- Experience with automation, AI Enabled development tools, Generative AI, Large Language Models (LLMs), AI Assistants, or Agentic AI solutions applied to semiconductor design, validation, or engineering workflows.
Skills: Verilog, SystemVerilog, RTL, HBM, SoC
This role has been open 5 days — well below the 62-day median for Digital/RTL Design roles.
Digital/RTL Design · RTL Design
|
Open roles in category
968
|
Median days open
62 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Micron Technology | All employers we track in this specialty (968 roles · 101 employers) |
|---|---|---|
| Open roles in this specialty | 21 | 968 |
| Open roles in the wider Digital Design & Verification family | 103 | 3109 · 114 employers |
| Median days open | 61 d | 62 d (−1 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Skills observed across this category: Verilog, SystemVerilog, RTL, HBM, SoC
Who's hiring in this category
- Qualcomm · 139 open roles · median 59 d
- Synopsys · 68 open roles · median 25 d
- AMD · 64 open roles · median 45 d
- NXP Semiconductors · 47 open roles · median 81 d
- Analog Devices · 45 open roles · median 40 d
- NVIDIA · 45 open roles · median 59 d
How we counted: 968 open Digital/RTL Design (RTL Design) roles from 101 employers tracked in the SemiconductorJobs index, counted 5 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.