NAND Custom Test Circuit Design Engineer - Hyderabad - Phoenix Aquila, India
Originally posted 4 August 2026 by the employer. Relisted by the employer on 4 August 2026.
About the role
This role involves developing, integrating, and optimizing custom test circuit architectures for NAND flash memory designs, including transistor-level digital, analog, mixed-signal, monitoring, control, and memory-array interface circuits.
What you'll do
- Develop, integrate, and optimize custom test circuit architectures for NAND flash memory designs.
- Interpret product specifications and test requirements to define circuit functionality, interfaces, and validation criteria.
- Create, review, and optimize schematics, device sizing, bias structures, and sensing/monitoring paths.
- Validate custom test circuits using XA simulations, Verilog simulations, and mixed-signal validation environments.
- Collaborate with layout teams on matching, parasitic sensitivity, shielding, routing, guard rings, and layout-dependent effects.
- Use laboratory measurements and silicon data to identify root cause and recommend circuit, test-mode, characterization, or screening improvements.
What you'll need
- Bachelor's or Master's degree in Electrical Engineering, Electronics Engineering, Computer Engineering, or a related field with 2+ years of experience.
- Hands-on experience in custom/analog circuit design, mixed-signal design, memory peripheral circuit design, or Product Engineering with strong transistor-level circuit and silicon-debug exposure.
- Strong understanding of CMOS device operation, transistor-level circuit design, leakage mechanisms, parasitics, PVT sensitivity, timing, loading, noise margin, power, and reliability principles.
- Hands-on proficiency with circuit build entry, waveform debug, and post-layout verification.
- Proficiency in XA or equivalent fast transistor-level simulation, Verilog, and mixed-signal validation methodologies.
- Proficiency in Python and scripting for simulation automation, regression analysis, result extraction, waveform processing, and engineering efficiency.
Nice to have
- Solid understanding of NAND flash memory architecture, test modes, peripheral circuits, internal signal access, and wafer/package test considerations.
- Laboratory skills using oscilloscope, logic or signal analyzer, source-measure equipment, function generator, and hands-on testing of silicon at wafer and package levels.
Skills: Memory/Logic/Analog circuits, layout, parasitic modeling, design validation, simulation
This role has been open 146 days — well above the 69-day median for Memory Design roles.
Memory Design · Memory Design
|
Open roles in category
287
|
Median days open
69 d
|
Median salary
$205k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Micron Technology | All employers we track in this specialty (287 roles · 29 employers) |
|---|---|---|
| Open roles in this specialty | 153 | 287 |
| Median days open | 86 d | 69 d (+17 d vs this employer) |
| Median salary (USD postings) | — | $205k |
Skills observed across this category: Memory/Logic/Analog circuits, layout, parasitic modeling, design validation, simulation
Who's hiring in this category
- Micron Technology (this employer) · 151 open roles · median 86 d
- Synopsys · 27 open roles · median 49 d
- SanDisk · 17 open roles · median 32 d
- Broadcom · 16 open roles · median 50 d
- Qualcomm · 12 open roles · median 149 d
- NVIDIA · 7 open roles · median 59 d
How we counted: 287 open Memory Design (Memory Design) roles from 29 employers tracked in the SemiconductorJobs index, counted 5 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.