Mixed-Signal Verification Intern - Shanghai, 上海, China
Originally posted 21 September 2026 by the employer — open 0 days.
About the role
This role supports the verification of AMS IPs and SoCs by building testbenches, running simulations, and debugging issues across analog and digital domains.
What you'll do
- Develop and maintain mixed-signal verification environments.
- Run AMS simulations (SPICE/Verilog-AMS/Spectre) and analyze waveforms.
- Execute test plans, create test cases, track coverage, and document results.
- Debug failures by correlating RTL, analog models, and integration.
- Automate regressions, log parsing, and reporting via Python/Shell/Make.
- Validate model quality, including behavioral assumptions and corner cases.
What you'll need
- Pursuing B.S./M.S. in EE, Microelectronics, or CompE.
- Knowledge of digital design/verification (Verilog/SV fundamentals).
- Familiarity with AMS concepts (Op-amp, ADC/DAC, PLL, LDO, noise, stability, PVT).
- Proficient in Linux.
- Comfortable with basic scripting.
- Strong debugging skills.
Skills: mixed-signal verification, AMS simulations, SPICE, Verilog-AMS, test plans
This role has been open 0 days — well below the 60-day median for Design Verification roles.
Design Verification · Design Verification
|
Open roles in category
1136
|
Median days open
60 d
|
Median salary
$188k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Infineon Technologies | All employers we track in this specialty (1136 roles · 94 employers) |
|---|---|---|
| Open roles in this specialty | 34 | 1136 |
| Open roles in the wider Digital Design & Verification family | 91 | 3020 · 114 employers |
| Median days open | 67 d | 60 d (+7 d vs this employer) |
| Median salary (USD postings) | — | $188k |
Skills observed across this category: mixed-signal verification, AMS simulations, SPICE, Verilog-AMS, test plans
Who's hiring in this category
- Qualcomm · 103 open roles · median 55 d
- AMD · 101 open roles · median 33 d
- NVIDIA · 89 open roles · median 67 d
- Synopsys · 58 open roles · median 22 d
- Micron Technology · 56 open roles · median 100 d
- SiFive · 52 open roles · median 48 d
How we counted: 1136 open Design Verification (Design Verification) roles from 94 employers tracked in the SemiconductorJobs index, counted 21 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.