Midcore Design Verification Engineer - Remote
$100,000 - $500,000 USD yearly
Originally posted 16 September 2026 by the employer.
Verify high-performance RISC-V CPU cores.
About the role
This role involves verifying high-performance RISC-V CPU cores. You will work on a modern out-of-order processor.
What you'll do
- Develop verification strategies.
- Build robust test environments.
- Uncover corner cases in out-of-order processors.
- Own meaningful portions of the verification effort.
- Architect test benches.
- Debug failures and drive issues to closure.
What you'll need
- 6+ years of experience in design verification for CPUs, SoCs, ASICs, or other complex digital designs.
- Strong experience with SystemVerilog and UVM, including testbench development, constrained-random testing, assertions, and functional coverage.
- Understanding of CPU architecture and/or microarchitecture, including concepts such as pipelines, out-of-order execution, caches, load/store, branch prediction, or instruction scheduling.
- Experience debugging RTL and simulation failures using waveforms and common simulation/debug tools.
- Strong C/C++ or Python skills and the ability to work effectively with RTL designers, architects, and other verification engineers.
Skills: SystemVerilog, UVM, CPU architecture, constrained-random testing, functional coverage
This role has been open 27 days — well below the 64-day median for Design Verification roles.
Design Verification · Design Verification
|
Open roles in category
1187
|
Median days open
64 d
|
Median salary
$187k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Tenstorrent | All employers we track in this specialty (1187 roles · 95 employers) |
|---|---|---|
| Open roles in this specialty | 13 | 1187 |
| Open roles in the wider Digital Design & Verification family | 29 | 3167 · 115 employers |
| Median days open | 138 d | 64 d (+74 d vs this employer) |
| Median salary (USD postings) | — | $187k |
Skills observed across this category: SystemVerilog, UVM, CPU architecture, constrained-random testing, functional coverage
Who's hiring in this category
- Qualcomm · 103 open roles · median 42 d
- AMD · 99 open roles · median 54 d
- NVIDIA · 79 open roles · median 61 d
- Synopsys · 61 open roles · median 30 d
- SiFive · 54 open roles · median 71 d
- Cadence Design Systems · 51 open roles · median 113 d
How we counted: 1187 open Design Verification (Design Verification) roles from 95 employers tracked in the SemiconductorJobs index, counted 14 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.