Mid Level ASIC Design Engineer - Sunnyvale, CA, United States
Originally posted 5 August 2026 by the employer.
About the role
As a member of Tensordyne’s ASIC team, you will be responsible for the microarchitecture and design implementation of high-performance AI ASICs. These ASICs closely couple novel computational accelerator units, compute, interconnects, networking, and 3rd-party IP blocks.
What you'll do
- Work with architecture on reconciling changes with respect to micro-architecture
- Define microarchitecture and document
- Select and integrate 3rd-party IP blocks
- Collaborate with design verification engineers
- Run, analyze frontend synthesis and address all issues
- Collaborate with backend teams on place-and-route guidance and timing closure
What you'll need
- 3+ years of ASIC design experience with RTL logic design in multi-million gate ASICs with Verilog or System Verilog.
- Experience in IP integration, specifically CPU IP into SoC.
- Knowledge of ARM/RISC-V/MIPS Architectures, Memory hierarchy, Cache coherency, Virtual memory, Multicore CPU operation.
- Familiarity with AMBA/APB/AXI Protocol.
- Familiarity with processor peripheral interfaces like SPI, eMMC, *MII, GPIO, I2C.
- Hands-on experience in all aspects of the ASIC development process with proficiency in front-end tools and methodologies.
- Familiarity with low power design. UPF flow for defining power intent of chips with multiple power domains.
- B.S. (M.S. preferred) degree in Electrical or Computer engineering.
Nice to have
- Previous experience with timing closure at high frequencies.
- Interest to explore AI architectures for convolution, transformer and other kinds of workloads.
Skills: convolutional neural network accelerator, ASIC, microarchitecture, RTL implementation, IP integration
This role has been open 73 days — well below the 83-day median for AI/ML Hardware Engineering roles.
AI/ML Hardware Engineering · AI ML Hardware
|
Open roles in category
508
|
Median days open
83 d
|
Median salary
$236k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Tensordyne | All employers we track in this specialty (508 roles · 77 employers) |
|---|---|---|
| Open roles in this specialty | 6 | 508 |
| Open roles in the wider Software, Firmware & Systems family | 11 | 6118 · 145 employers |
| Median days open | 21 d | 83 d (−62 d vs this employer) |
| Median salary (USD postings) | — | $236k |
Skills observed across this category: convolutional neural network accelerator, ASIC, microarchitecture, RTL implementation, IP integration
Who's hiring in this category
- Qualcomm · 99 open roles · median 114 d
- NVIDIA · 93 open roles · median 54 d
- AMD · 41 open roles · median 81 d
- Micron Technology · 27 open roles · median 68 d
- Analog Devices · 19 open roles · median 36 d
- Mobileye · 17 open roles · median 80 d
How we counted: 508 open AI/ML Hardware Engineering (AI ML Hardware) roles from 77 employers tracked in the SemiconductorJobs index, counted 18 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Software, Firmware & Systems family row. Figures refresh nightly.