Memory Silicon Validation Engineer - Taipei, Taiwan
Originally posted 23 September 2026 by the employer.
About the role
This role involves owning high-speed memory bring-up, characterization, and qualification on NVIDIA's flagship GPU, CPU, and SoC programs.
What you'll do
- Bring up high-speed memory interfaces (GDDR, LPDDR, HBM) on complex GPU, CPU and SoC silicon from power-on through full PVT characterization.
- Own functional validation, IO tuning, timing margin analysis, and multi-vendor DRAM qualification across the memory controller, PHY, and DRAM device.
- Lead root-cause closure on multi-team memory failures spanning silicon, controller, PHY, package, board SI/PI, firmware, and workload.
- Design and deploy AI-enabled workflows for margin data analysis, shmoo bucketing, failure signature detection, and workload-vs-margin correlation.
- Partner with pre-Si architecture, design, and DV teams to translate new memory features into targeted post-Si validation plans.
- Work across globally distributed teams including silicon design, PHY, PCB, firmware, software, DRAM vendors, and manufacturing partners.
What you'll need
- B.Tech or M.Tech in Electrical, Electronics, or Computer Engineering (or equivalent experience) plus 4+ years in the semiconductor industry with at least 3 years directly on memory interface bring-up, characterization, and qualification on shipped silicon.
- Deep protocol and physical-layer understanding of GDDR, LPDDR, or HBM, including training, calibration, IO tuning, timing margin, and vendor-to-vendor behavior differences.
- Strong hands-on lab fundamentals with oscilloscope, DMM, thermal chambers, and protocol analyzers.
- Working knowledge of PCB stack-up, board layout, power planes, and SI/PI guidelines.
- Demonstrated AI-driven workflow built or scaled for memory characterization, margin analysis, or failure triage.
Skills: Memory Silicon Validation, GDDR, LPDDR, HBM, memory interface bring-up, characterization, qualification
This role has been open 0 days — well below the 51-day median for Post-Silicon Validation roles.
Post-Silicon Validation · Silicon Validation
|
Open roles in category
332
|
Median days open
51 d
|
Median salary
$167k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | NVIDIA | All employers we track in this specialty (332 roles · 62 employers) |
|---|---|---|
| Open roles in this specialty | 20 | 332 |
| Open roles in the wider Silicon Validation & Test family | 104 | 2135 · 111 employers |
| Median days open | 20 d | 51 d (−31 d vs this employer) |
| Median salary (USD postings) | — | $167k |
Skills observed across this category: Memory Silicon Validation, GDDR, LPDDR, HBM, memory interface bring-up, characterization
Who's hiring in this category
- AMD · 50 open roles · median 49 d
- Micron Technology · 30 open roles · median 26 d
- Qualcomm · 25 open roles · median 84 d
- Graphcore · 19 open roles · median 99 d
- NVIDIA (this employer) · 19 open roles · median 20 d
- Microchip Technology · 18 open roles · median 52 d
How we counted: 332 open Post-Silicon Validation (Silicon Validation) roles from 62 employers tracked in the SemiconductorJobs index, counted 24 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.