Memory Design Engineer - IND-Bangalore Electronic City - S1, India
Originally posted 16 September 2026 by the employer.
Design and develop SRAM and Register file compilers in 28nm, 16FF, 7FF, or 5FF technologies.
About the role
This role involves the design and development of single/multiport SRAM and Register file compilers.
What you'll do
- Contribute to the design and development of SRAM and Register file compilers in 28nm/16FF/7FF/5FF Technologies.
- Perform circuit design and simulation of key components such as bitcell, WL decoder, SAMP, Column decoder and control logic.
- Develop critical path and characterization flow for detailed margin and characterization simulations.
- Conduct statistical analysis of Bit-Cell and Sense Amplifier and Self Time Blocks for Compiler Target yield Sign-Off.
- Perform design tuning, margin analysis, and sign-off for complete compiler to meet yield and performance targets.
- Execute logic simulations and detailed timing analysis of key paths in high speed memory design.
- Conduct signal-integrity (EM) and power-integrity (IR drop) analysis and design.
What you'll need
- Expertise in high speed/low power CMOS circuit design, clocking scheme, static and dynamic logic circuits.
- Experience in designing and driving one or many Memory Compilers Specifications to final release.
- Deep expertise in understanding and developing split rail, power gating architecture and circuit design.
- Hands-on experience on silicon debug/diagnose failures, including analysis and fixing.
- Complete hands-on experience in using Cadence/Mentor schematic/layout editor tools.
- Complete hands-on experience with circuit simulation, MC analysis and waveform viewer tools such as HSPICE, HSIM, XA, FinSim, XARA, nWave, waveform viewer.
- Experience in understanding the layout design issues in sub nanometer regime.
Nice to have
- Experience in Skill/Perl/Python Scripting is a strong plus.
- Expertise in understanding Memory DFT is a Plus.
Skills: SRAM, bitcell, Sense Amplifier, CMOS circuit design, Cadence
This role has been open 19 days — well below the 69-day median for Memory Design roles.
Memory Design · Memory Design
|
Open roles in category
287
|
Median days open
69 d
|
Median salary
$205k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Broadcom | All employers we track in this specialty (287 roles · 29 employers) |
|---|---|---|
| Open roles in this specialty | 16 | 287 |
| Median days open | 51 d | 69 d (−18 d vs this employer) |
| Median salary (USD postings) | — | $205k |
Skills observed across this category: SRAM, bitcell, Sense Amplifier, CMOS circuit design, Cadence
Who's hiring in this category
- Micron Technology · 151 open roles · median 86 d
- Synopsys · 27 open roles · median 49 d
- SanDisk · 17 open roles · median 32 d
- Broadcom (this employer) · 16 open roles · median 50 d
- Qualcomm · 12 open roles · median 149 d
- NVIDIA · 7 open roles · median 59 d
How we counted: 287 open Memory Design (Memory Design) roles from 29 employers tracked in the SemiconductorJobs index, counted 5 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.