Design and characterize embedded SRAM and Register File IPs for ultra-low-power SoCs.
Originally posted 17 July 2026 by the employer.
About the role
This role involves the architecture, design, compiler development, characterization, and silicon validation of embedded SRAM and Register File (RF) IPs for ultra-low-power SoCs.
What you'll do
- Design ultra-low power embedded SRAM and Register File IPs for advanced SoC products.
- Develop and enhance SRAM compiler architectures supporting multiple memory configurations, banking schemes, and redundancy options.
- Design and optimize memory peripheral circuits such as sense amplifiers, write drivers, decoders, word-line drivers, pre-charge circuits, Read/write assist circuits, redundancy, and repair logic.
- Optimize memory designs for Area, Performance, Leakage power, Dynamic power, yield, and manufacturability.
- Analyze low-voltage failure mechanisms including read disturb, write failure, read/write margins, retention failures, and process variation effects.
- Develop automation scripts using Python, Tcl, or Perl to improve compiler generation, characterization efficiency, regression, and design productivity.
What you'll need
- Bachelor’s, Master’s, or PhD in Electrical Engineering, Electronics, or related discipline.
- Strong understanding of SRAM architecture, compiler design, and custom memory circuit design.
- Proven experience developing embedded SRAM or Register File IP for advanced 12nm FINFET technologies and below.
- Hands-on experience with SRAM compiler development and configurable memory generation.
- Strong expertise in custom memory characterization and production-quality Liberty (.lib) generation.
- Deep knowledge of bit-cell operation, sense amplifier design, read/write assist techniques, low-voltage SRAM operation, process variation analysis, timing, and power characterization.
- Experience with Cadence Virtuoso, Spectre, HSPICE or equivalent SPICE simulators, Cadence Liberate MX and Monte Carlo simulations.
- Familiarity with memory compiler architecture and IP delivery flows.
- Experience supporting silicon bring-up, characterization, debug, and production qualification.
- Strong scripting skills in Python, Tcl, Perl, or equivalent programming languages.
Skills: SRAM, Register File, memory compiler, sense amplifiers, low-voltage SRAM
More semiconductor jobs: Singapore jobs
This role has been open 105 days — well above the 72-day median for Memory Design roles.
Memory Design · Memory Design
|
Open roles in category
302
|
Median days open
72 d
|
Category median salary (all employers)
$205k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Ambiq Micro | All employers we track in this specialty (302 roles · 29 employers) |
|---|---|---|
| Open roles in this specialty | 2 | 302 |
| Median days open | 71 d | 72 d (−1 d vs this employer) |
| Median salary (USD postings) | — | $205k |
Skills observed across this category: SRAM, Register File, memory compiler, sense amplifiers, low-voltage SRAM
Who's hiring in this category
- Micron Technology · 154 open roles · median 82 d
- Synopsys · 30 open roles · median 77 d
- Qualcomm · 18 open roles · median 106 d
- Broadcom · 16 open roles · median 78 d
- SanDisk · 15 open roles · median 7 d
- NVIDIA · 8 open roles · median 59 d
How we counted: 302 open Memory Design (Memory Design) roles from 29 employers tracked in the SemiconductorJobs index, counted 6 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.