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Teradyne

Mechanical Engineering Manager (Memory Test, San Jose, CA)

Teradyne San Jose, CA, United States 2 months ago
Digital Design & SoC Architecture

Originally posted 25 August 2026 by the employer.

Lead a team developing memory test platforms at Teradyne.

About the role

This role involves leading a team responsible for the development of memory test platforms. This team designs and supports the mechanical platforms and accessories for Teradyne's advanced memory test solutions.

What you'll do

  • Lead engineering activities related to memory test platforms, including test heads, manipulators, support bays, and test beds.
  • Manage team staffing, budgets, performance, professional development, and recruiting efforts.
  • Establish and continuously improve efficient, quality-focused product development processes.
  • Define and execute the technology roadmap for future platform architectures.
  • Collaborate with suppliers, manufacturing partners, and external engineering resources.
  • Lead cross-functional collaboration with Electrical, Software, Systems, NPI, Operations, Manufacturing, and Service Engineering teams.

What you'll need

  • Bachelor's degree in Mechanical Engineering, Electrical Engineering, or a related technical discipline.
  • 8+ years of experience developing mechanical or electromechanical products, preferably within semiconductor capital equipment or a related industry.
  • Demonstrated experience leading complex hardware development programs from concept through production.
  • Strong understanding of mechanical design, materials selection, product optimization, and manufacturing processes.
  • Proven leadership experience managing engineering teams and external engineering partners.
  • Broad technical knowledge spanning mechanical, thermal, electrical, and system-level engineering disciplines.
  • Solid understanding of the product development lifecycle for electromechanical systems.

Nice to have

  • Experience with semiconductor test equipment, automation systems, or other high-performance capital equipment.
  • Experience driving platform architecture and long-term product roadmaps.
  • Familiarity with design-for-manufacturing (DFM), design-for-serviceability (DFS), and reliability engineering practices.
Market context

This role has been open 25 days — well below the 49-day median for Hardware Systems Engineering roles.

Hardware Systems Engineering · AI ML Hardware

Open roles in category
946
Median days open
49 d
Median salary
$158k
See the full market breakdown ▾Category comparison, and who else is hiring
How Teradyne compares in Hardware Systems Engineering hiring
Metric Teradyne All employers we track in this specialty (946 roles · 102 employers)
Open roles in this specialty 48 946
Open roles in the wider Software, Firmware & Systems family 99 6116 · 146 employers
Median days open 25 d 49 d (−24 d vs this employer)
Median salary (USD postings) — $158k

Who's hiring in this category

  • Intel Corporation · 72 open roles · median 31 d
  • KLA Corporation · 62 open roles · median 41 d
  • Applied Materials · 49 open roles · median 61 d
  • NVIDIA · 49 open roles · median 67 d
  • Teradyne (this employer) · 48 open roles · median 25 d
  • AMD · 47 open roles · median 46 d

How we counted: 946 open Hardware Systems Engineering (AI ML Hardware) roles from 102 employers tracked in the SemiconductorJobs index, counted 13 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Software, Firmware & Systems family row. Figures refresh nightly.

Apply now
San Jose, CA, United States
On-site
2 months ago

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