Manager, SOC Product & Test Engineering - TX, Austin, United States
Originally posted 1 October 2026 by the employer.
Manage a global Product and Test Engineering team focused on high-performance mobile and desktop processors.
About the role
The team plans and executes early silicon bring-up, characterization, final product definition, and comprehensive test solution development through high-volume production ramp.
What you'll do
- Deliver production-ready test programs and hardware fixtures ahead of critical product launch windows.
- Drive continuous test time reduction (TTR) and structural yield optimization.
- Translate complex silicon behavior and yield data into actionable roadmaps for executive stakeholders.
What you'll need
- Master of Science (MS) in Electrical Engineering, Computer Engineering, or a closely related technical discipline.
- Experience leading global, multi-site 93K test engineering teams.
- Experience with high-volume manufacturing, test time reduction, yield optimization, and OSAT production environments.
- Expertise in Advantest V93000 (93K) test infrastructure, automation, test coverage, and efficiency improvements.
- Strong background in advanced SoC testing, including scan, functional, high-speed interface, and chiplet-based architectures.
- Experience partnering with DFT, validation, design, and manufacturing teams.
Nice to have
- Expert in Advantest V93000 Smart Scale and EXA Scale platforms, including SmarTest (SMT7/SMT8), multicore test methodologies, and platform transitions.
- Deep experience with CpK monitoring.
This role has been open 8 days — well below the 24-day median for Silicon Test Engineering roles.
Silicon Test Engineering · DFT Test
|
Open roles in category
523
|
Median days open
24 d
|
Median salary
$169k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | AMD | All employers we track in this specialty (523 roles · 75 employers) |
|---|---|---|
| Open roles in this specialty | 28 | 523 |
| Open roles in the wider Silicon Validation & Test family | 159 | 2209 · 111 employers |
| Median days open | 36 d | 24 d (+12 d vs this employer) |
| Median salary (USD postings) | — | $169k |
Who's hiring in this category
- Teradyne · 67 open roles · median 21 d
- Infineon Technologies · 39 open roles · median 35 d
- Renesas Electronics · 39 open roles · median 24 d
- AMD (this employer) · 28 open roles · median 36 d
- Micron Technology · 28 open roles · median 30 d
- Qualcomm · 25 open roles · median 23 d
How we counted: 523 open Silicon Test Engineering (DFT Test) roles from 75 employers tracked in the SemiconductorJobs index, counted 9 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.