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Synopsys

LPDDR IP Design Principle Engineer

Synopsys img src="https://tbcdn.talentbrew.com/company/44408/gst_v1/img/icon-map-black.png" height="15" width="15" alt="pin icon">Bengaluru, India 5 months ago
Analog & Mixed-Signal Design

Originally posted 29 April 2026 by the employer — open 134 days.

Synopsys is the leading provider of LPDDR PHY IP products.

About the role

This role involves leading the innovation and development of the DesignWare LPDDR PHY IP solution within the Synopsys LPDDR PHY IP team. It focuses on DDR PHY IP development and solution delivery, contributing to all phases from design specification to productization, including customer support for SoCs.

What you'll do

  • Manage a team of design engineers and collaborate with Architecture, Verification, Physical implementation, and Firmware teams.
  • Contribute to all phases of DDR PHY IP design, from specification to productization.
  • Provide customer support for DDR PHY IP integration into SoCs.
  • Lead the team to achieve timing, performance, and power goals.

What you'll need

  • BS in Electrical Engineering with at least 12-15 years of experience in complex technical development.
  • 2 years of experience in people management.
  • Experience with synthesizable Verilog and System Verilog design concepts and implementation.
  • Experience with front-end design flows including linting, synthesis, STA, cross-domain clocking, DFT, and power optimization techniques.
  • Excellent communication skills.

Nice to have

  • Understanding of memory and memory PHY architecture.

Skills: analog and mixed-signal circuits, high-speed SerDes interfaces, AFEs, DFEs, clocking circuits, advanced CMOS technologies

Synopsys

Synopsys

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img src="https://tbcdn.talentbrew.com/company/44408/gst_v1/img/icon-map-black.png" height="15" width="15" alt="pin icon">Bengaluru, India
On-site
5 months ago

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