Low-Power & CDC Verification Engineer - CA, Santa Clara, United States
Originally posted 15 October 2026 by the employer.
About the role
As a Low-Power & CDC Verification Engineer, you will work with formal experts and designers to verify formal properties and drive convergence.
What you'll do
- Review power features for verification scoping and test plan writing.
- Coordinate with various teams to develop verification components with various methodologies.
- Review and sign off verification deliverables on power features for project milestones.
- Work with RTL team to debug and sign off power/clock domain crossing violations for project milestones.
What you'll need
- At least 1 year of experience in feature verification from high level design to tape out verification.
- Experience working in simulation, emulation, and formal verification environments.
- Power/Clock domain crossing exposure, UPF.
- Scripting in Perl or Python.
Nice to have
- Leadership skills.
Skills: formal verification, power features, clock domain crossing, UPF, RTL
This role has been open 0 days — well below the 65-day median for Design Verification roles.
Design Verification · Design Verification
|
Open roles in category
1192
|
Median days open
65 d
|
Median salary
$186k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | AMD | All employers we track in this specialty (1192 roles · 95 employers) |
|---|---|---|
| Open roles in this specialty | 97 | 1192 |
| Open roles in the wider Digital Design & Verification family | 255 | 3183 · 115 employers |
| Median days open | 51 d | 65 d (−14 d vs this employer) |
| Median salary (USD postings) | — | $186k |
Skills observed across this category: formal verification, power features, clock domain crossing, UPF, RTL
Who's hiring in this category
- Qualcomm · 106 open roles · median 42 d
- AMD (this employer) · 99 open roles · median 55 d
- NVIDIA · 82 open roles · median 57 d
- Synopsys · 63 open roles · median 30 d
- SiFive · 54 open roles · median 72 d
- Cadence Design Systems · 50 open roles · median 114 d
How we counted: 1192 open Design Verification (Design Verification) roles from 95 employers tracked in the SemiconductorJobs index, counted 15 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.