Lead Technical Program Manager - San Jose, California, United States
$187,000 - $270,700 USD yearly
Originally posted 6 October 2026 by the employer.
Altera is seeking a Lead Technical Program Manager to provide strategic technical program leadership for the development and delivery of FPGA products.
About the role
This role provides strategic technical program leadership for the development and delivery of FPGA products, spanning architecture, silicon, IP, hardware, software, firmware, validation, and manufacturing readiness.
What you'll do
- Provide strategic technical program leadership for FPGA product development programs spanning architecture, silicon, IP, hardware, software, firmware, validation, and production.
- Own program strategy, execution frameworks, critical milestones, and cross-functional alignment from early product definition through silicon bring-up, validation, sampling, and production release.
- Drive alignment across multiple engineering organizations and geographically distributed teams, establishing clear ownership, accountability, dependencies, and decision-making mechanisms.
- Drive technical readiness and execution across pre-silicon and post-silicon phases, including design completion, verification, tape-out, silicon bring-up, validation, debug, customer readiness, and production ramp.
- Develop executive-level program reporting that provides clear visibility into schedule, technical health, risks, dependencies, resource requirements, and key decisions.
- Establish and continuously improve program management methodologies, operating mechanisms, tools, and reporting frameworks that increase predictability and execution discipline across engineering.
What you'll need
- Bachelor’s degree in Electrical Engineering, Computer Engineering, Software Engineering, or a related technical discipline, with 12+ years of experience in Technical Program Management, Engineering Program Management, or technical engineering leadership roles.
- 8+ years of experience leading complex, cross-functional semiconductor, FPGA, ASIC, silicon, or hardware/software development programs involving multiple engineering organizations.
- Strong silicon/hardware design domain expertise with a deep understanding of HW/FW/SW interactions, enabling effective engagement across architecture, RTL, design verification, physical design, firmware, software, system, and validation teams.
- Proven leadership across the full Product Lifecycle (PLC), from product definition and architecture through development, verification, tape-out, silicon bring-up, validation, debug, sampling, and production.
- Demonstrated ability to communicate complex technical and program issues effectively to senior engineering leaders, executives, and cross-functional stakeholders.
- 7+ years of experience leading programs across multiple organizations and geographically distributed international teams, with a demonstrated ability to influence senior stakeholders and drive accountability without direct authority.
Nice to have
- 5+ years of technical experience in one or more of the following areas: Transceivers, Embedded Systems (particularly ARM), Config and Security, PCIe, Ethernet, or ASIC Design / Design Verification (DV).
- Master’s degree or Ph.D. in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field.
- 10+ years of experience working directly with FPGA, ASIC, semiconductor, or silicon-based product development.
- Deep experience with pre- and post-silicon execution, including verification, validation, silicon bring-up, debug, characterization, and production readiness.
- Familiarity with Agile, hybrid Agile/Waterfall, or other scaled execution methodologies within hardware and semiconductor development environments.
Skills: FPGA products, silicon bring-up, validation, tape-out, RTL
This role has been open 3 days — well below the 50-day median for Technical Program Management roles.
Technical Program Management · SOC Architecture
|
Open roles in category
158
|
Median days open
50 d
|
Median salary
$220k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Altera | All employers we track in this specialty (158 roles · 47 employers) |
|---|---|---|
| Open roles in this specialty | 1 | 158 |
| Median days open | 3 d | 50 d (−47 d vs this employer) |
| Median salary (USD postings) | — | $220k |
Skills observed across this category: FPGA products, silicon bring-up, validation, tape-out, RTL
Who's hiring in this category
- Qualcomm · 25 open roles · median 49 d
- AMD · 16 open roles · median 36 d
- NVIDIA · 16 open roles · median 47 d
- Synopsys · 13 open roles · median 49 d
- Arm Holdings · 10 open roles · median 75 d
- Astera Labs · 5 open roles · median 106 d
How we counted: 158 open Technical Program Management (SOC Architecture) roles from 47 employers tracked in the SemiconductorJobs index, counted 9 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.