Skip to main content
Cadence Design Systems

Lead Software Engineer: AI for Hardware Verification - San Jose, United States

Cadence Design Systems SAN JOSE, United States 12 days ago
Physical Design & EDA

$119,000 - $221,000 USD yearly

Originally posted 29 September 2026 by the employer.

Join the HSV Software team building AI-enabled software for emulation and prototyping platforms.

About the role

As a Lead Software Engineer, you will be part of the HSV Software team in the SVG group, building AI-enabled software products that support emulation and prototyping platforms.

What you'll do

  • Design and develop AI-enabled software components for emulation and prototyping workflows.
  • Build LLM-based agents, RAG workflows, and automation services to improve design bring-up, verification, debug, and validation.
  • Apply secure and responsible AI practices, including data protection, access control, and handling sensitive design data.
  • Create and execute testing, evaluation, and observability workflows for assigned AI product areas.
  • Serve as a technical resource for peers and less-experienced engineers, collaborating with internal partners to deliver high-quality AI-enabled software.

What you'll need

  • Bachelor’s degree in Computer Science, Computer Engineering, Electrical Engineering, or equivalent experience; typically 4+ years with a Bachelor’s, 2+ years with a Master’s, or PhD-level preparation in related software development.
  • Strong Python skills and software engineering fundamentals, including APIs, testing, debugging, maintainability, Unix/Linux environments, and distributed development workflows.
  • Hands-on experience building AI-enabled applications, agentic workflows, or automation services using LLM APIs, open-source models, enterprise AI platforms, and orchestration tools such as LangGraph, LangChain, AutoGen, CrewAI, or similar frameworks.
  • Understanding of modern RAG and agentic AI patterns, including retrieval, chunking, embeddings, vector or hybrid search, reranking, tool calling, workflow orchestration, human-in-the-loop review, and traceability.
  • Ability to evaluate, secure, and debug AI product behavior using golden datasets, regression tests, hallucination checks, prompt and retrieval analysis, observability traces, quality metrics, and responsible AI practices.

Nice to have

  • Experience developing software using version control systems and modern CI/CD practices.
  • Experience with other programming languages such as C++, Tcl, or JavaScript/TypeScript.
  • Knowledge or experience with design verification, emulation, prototyping, or hardware-assisted debug workflows.
  • Knowledge or experience with EDA and VLSI design, including Verilog, SystemVerilog, or VHDL.
  • Exposure to practical AI application security, such as prompt-injection awareness, safe tool integration, access control, input/output validation, or secure handling of design data.

Skills: AI-enabled software, emulation workflows, LLM-based agents, RAG workflows, Python, hardware verification

Market context

This role has been open 11 days — well below the 31-day median for EDA/CAD Engineering roles.

EDA/CAD Engineering · AI EDA Design

Open roles in category
61
Median days open
31 d
Median salary
$193k
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
How Cadence Design Systems compares in EDA/CAD Engineering hiring
Metric Cadence Design Systems All employers we track in this specialty (61 roles · 24 employers)
Open roles in this specialty 6 61
Open roles in the wider Physical Implementation family 183 1473 · 107 employers
Median days open 48 d 31 d (+17 d vs this employer)
Median salary (USD postings) — $193k

Skills observed across this category: AI-enabled software, emulation workflows, LLM-based agents, RAG workflows, Python, hardware verification

Who's hiring in this category

  • NXP Semiconductors · 12 open roles · median 58 d
  • Keysight Technologies · 7 open roles · median 10 d
  • NVIDIA · 7 open roles · median 30 d
  • Cadence Design Systems (this employer) · 6 open roles · median 47 d
  • Altera · 3 open roles · median 2 d
  • Qualcomm · 3 open roles · median 47 d

How we counted: 61 open EDA/CAD Engineering (AI EDA Design) roles from 24 employers tracked in the SemiconductorJobs index, counted 10 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Physical Implementation family row. Figures refresh nightly.

Apply now
SAN JOSE, United States
On-site
$119,000 - $221,000 USD yearly
12 days ago

Share this job