Originally posted 16 September 2026 by the employer — open 3 days.
Work with Genus Synthesis Solution.
About the role
This role involves product engineering for logic synthesis software, specifically the Genus Synthesis Solution, to optimize Power, Performance & Area (PPA) for digital ASICs.
What you'll do
- Perform product engineering for Genus Synthesis Solution, achieving best-in-class PPA for latest digital ASICs.
- Understand internal flows for new features, verify correctness, and conduct experiments for optimal solutions.
- Solve problems in physical aware synthesis to bridge the gap between logic synthesis and place and route.
- Support field engineers and customers in using Genus, acting as the first line of support between R&D and customers.
- Verify interoperability of Genus with other digital logic software tools within Cadence Design Systems, Inc.
- Interface with internal and external customers to understand future software requirements and document Product Requirement Specifications (PRS).
What you'll need
- BE/BTech/ME/MS/MTech or equivalent.
- Must have logic design and timing closure skills.
- Strong analysis skills to debug complex timing closure, logical and physical design problems.
Nice to have
- Experience in design and EDA with emphasis on Cadence tools of Synthesis, Physical Design & timing closure at 20nm or below nodes.
- Prior Designer, Product Engineering or Application Engineering experience in digital implementation, especially synthesis.
- Understanding of industry challenges in digital implementation & sign off domain with exposure to 28nm & below foundry process nodes.
- Industry experience with EDA tools in the IC digital implementation flow, preferably on Genus and Innovus.
- Experience in Logic Design and Synthesis, Formal Verification, Low Power design, Physical Design and Timing Closure for block level and top level designs.
- Automation skills using Perl, Tcl and shell scripting.
- Knowledge of HDL – Verilog or System Verilog.
Skills: logic synthesis software, Genus, PPA, physical aware synthesis, EDA tools
This role has been open 3 days — well below the 85-day median for EDA/CAD Engineering roles.
EDA/CAD Engineering · EDA Tools
|
Open roles in category
671
|
Median days open
85 d
|
Median salary
$195k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Cadence Design Systems | All employers we track in this specialty (671 roles · 74 employers) |
|---|---|---|
| Open roles in this specialty | 168 | 671 |
| Open roles in the wider Physical Implementation family | 198 | 1371 · 106 employers |
| Median days open | 147 d | 85 d (+62 d vs this employer) |
| Median salary (USD postings) | — | $195k |
Skills observed across this category: logic synthesis software, Genus, PPA, physical aware synthesis, EDA tools
Who's hiring in this category
- Cadence Design Systems (this employer) · 168 open roles · median 147 d
- Synopsys · 55 open roles · median 58 d
- NVIDIA · 47 open roles · median 71 d
- Micron Technology · 36 open roles · median 117 d
- Qualcomm · 34 open roles · median 71 d
- Intel Corporation · 29 open roles · median 24 d
How we counted: 671 open EDA/CAD Engineering (EDA Tools) roles from 74 employers tracked in the SemiconductorJobs index, counted 19 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Physical Implementation family row. Figures refresh nightly.