Lead Power Methodology Analysis Engineer - CA, Santa Clara, United States
Originally posted 22 October 2026 by the employer.
About the role
This role develops power analysis, modeling, and optimization methodologies across the semiconductor design lifecycle, from architectural exploration through implementation and silicon validation.
What you'll do
- Develop methodologies for power analysis, modeling, correlation, and optimization. - Create scalable frameworks, automation, and data-driven solutions for power evaluation and design optimization. - Apply advanced analytics and AI/ML techniques to improve engineering workflows and product efficiency. - Partner with architecture, design, verification, implementation, software, and silicon teams to address power and performance challenges. - Lead technical initiatives spanning multiple projects and engineering disciplines while mentoring engineers and establishing engineering practices.
What you'll need
- MS or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent relevant industry experience. - Track record of leading technical initiatives and collaborating across engineering disciplines. - Technical communication and presentation experience demonstrated through technical publications, presentations, training, documentation, or executive briefings.
Nice to have
- Experience in semiconductor design, power analysis, power optimization, performance analysis, or related areas. - Understanding of modern ASIC and SoC development methodologies. - Experience with power modeling and estimation, RTL and architecture-level power analysis, or workload-driven analysis. - Experience in power-performance optimization, physical design power optimization, or silicon power characterization. - Experience with AI/ML applications for engineering productivity and power optimization.
Skills: Power Analysis, Power Modeling, Methodology, Optimization, AI/ML
This role has been open 0 days — well below the 72-day median for EDA/CAD Engineering roles.
EDA/CAD Engineering · EDA Tools
|
Open roles in category
683
|
Median days open
72 d
|
Median salary
$195k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | AMD | All employers we track in this specialty (683 roles · 75 employers) |
|---|---|---|
| Open roles in this specialty | 23 | 683 |
| Open roles in the wider Physical Implementation family | 91 | 1489 · 110 employers |
| Median days open | 24 d | 72 d (−48 d vs this employer) |
| Median salary (USD postings) | — | $195k |
Skills observed across this category: Power Analysis, Power Modeling, Methodology, Optimization, AI/ML
Who's hiring in this category
- Cadence Design Systems · 155 open roles · median 149 d
- Synopsys · 62 open roles · median 40 d
- Micron Technology · 46 open roles · median 49 d
- Qualcomm · 37 open roles · median 73 d
- GlobalFoundries · 36 open roles · median 28 d
- Keysight Technologies · 34 open roles · median 76 d
How we counted: 683 open EDA/CAD Engineering (EDA Tools) roles from 75 employers tracked in the SemiconductorJobs index, counted 22 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Physical Implementation family row. Figures refresh nightly.