Lead Design Engineer - Bangalore, India
Analog & Mixed-Signal Design
Originally posted 17 March 2026 by the employer — open 177 days.
This role focuses on complex SerDes IP design.
About the role
This role involves leading the design of digital circuits for High-Speed IO/SerDes, focusing on complex datapath designs.
What you'll do
- Perform RTL coding and datapath designs.
- Design complex FIFO circuits.
- Apply knowledge of complete design flows and rigorous checks (LINT, SDC, CDC, DFT, CLP, Synth, trial PnR).
- Conduct micro architecture, design, and synthesize for complex SerDes IP in various technology nodes.
- Work closely with Analog design teams for co-development of algorithms, feedback design loops, and high-speed critical digital circuits.
- Understand and work with signal processing IPs, including calibrations, PLLs, and dividers.
What you'll need
- Proficiency in RTL coding.
- Experience with datapath designs.
- Strong knowledge of design flows: LINT, SDC, CDC, DFT, CLP, Synth, and trial PnR.
- Good experience in micro architecture, design, and synthesis for complex SerDes IP.
- Experience with USB, PCIe, and MIPI (DPHY) protocols.
- Good understanding of working with signal processing IPs (calibrations, PLLs, dividers).
Skills: RTL coding, datapath design, SerDes IP, USB, PCIe, MIPI
Market context
This role has been open 169 days — well above the 91-day median for High-Speed IO/SerDes Design roles.
High-Speed IO/SerDes Design · Serdes Highspeed
|
Open roles in category
217
|
Median days open
91 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Cadence Design Systems | All employers we track in this specialty (217 roles · 44 employers) |
|---|---|---|
| Open roles in category | 19 | 217 |
| Median days open | 153 d | 91 d (+62 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Skills observed across this category: RTL coding, datapath design, SerDes IP, USB, PCIe, MIPI
Who's hiring in this category
- AMD · 24 open roles · median 61 d
- Cadence Design Systems (this employer) · 19 open roles · median 153 d
- Qualcomm · 17 open roles · median 74 d
- Synopsys · 16 open roles · median 53 d
- Broadcom · 11 open roles · median 142 d
- NVIDIA · 10 open roles · median 95 d
How we counted: 217 open High-Speed IO/SerDes Design (Serdes Highspeed) roles from 44 employers tracked in the SemiconductorJobs index, counted 10 Sept 2026. Figures refresh nightly.