$119,000 - $221,000 USD yearly
Originally posted 23 September 2026 by the employer.
This role focuses on technical support for Palladium, Protium, and Virtual Protocol (PDAPP) products.
About the role
This role involves providing technical support for Palladium, Protium, and Virtual Protocol (PDAPP) products to customers and field AE teams. You will work with a broad spectrum of designs and customers.
What you'll do
- Take ownership and drive resolution for product issues reported by field AEs and customers.
- Debug customer-reported failures, produce test cases, and log issues with HSV R&D teams.
- Recommend workarounds or application-level solutions to customers.
- Test R&D fixes and patches.
- Work with customer and internal groups to spec out enhancement requests.
- Test new product features for future software releases or hardware platforms, including internal beta activities.
What you'll need
- BS-EE/CE with a minimum of 5 years experience in design and/or verification of complex digital designs, or Applications engineering/technical support.
- Strong knowledge of design debug techniques and logic design.
- Knowledgeable in verification methodologies for complex EDA environments.
- Proficiency in HDL language like Verilog, System Verilog, and VHDL.
- Proficiency in Unix/Linux scripting languages (ksh/bash/csh).
- Proficiency in PCIe, USB, and Ethernet protocol.
- Proficiency in TBA, SVA, SV coverage, Low Power (UPF).
Nice to have
- UVM experience.
- Experience with emulation, Cadence's Palladium product.
Skills: Palladium, Protium, technical support, design debug, Verilog, System Verilog
This role has been open 17 days — well below the 81-day median for EDA/CAD Engineering roles.
EDA/CAD Engineering · EDA Tools
|
Open roles in category
690
|
Median days open
81 d
|
Median salary
$195k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Cadence Design Systems | All employers we track in this specialty (690 roles · 74 employers) |
|---|---|---|
| Open roles in this specialty | 160 | 690 |
| Open roles in the wider Physical Implementation family | 183 | 1473 · 107 employers |
| Median days open | 168 d | 81 d (+87 d vs this employer) |
| Median salary (USD postings) | — | $195k |
Skills observed across this category: Palladium, Protium, technical support, design debug, Verilog, System Verilog
Who's hiring in this category
- Cadence Design Systems (this employer) · 160 open roles · median 169 d
- Synopsys · 61 open roles · median 38 d
- Micron Technology · 42 open roles · median 91 d
- Qualcomm · 42 open roles · median 62 d
- NVIDIA · 41 open roles · median 75 d
- GlobalFoundries · 31 open roles · median 52 d
How we counted: 690 open EDA/CAD Engineering (EDA Tools) roles from 74 employers tracked in the SemiconductorJobs index, counted 11 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Physical Implementation family row. Figures refresh nightly.