Layout Design, Staff Engineer in Da Nang
Originally posted 4 June 2026 by the employer.
About the role
This role involves leading physical layout design for advanced memory IP, including SRAM, ROM, and eDRAM.
What you'll do
- Lead physical layout design for advanced memory IP including SRAM, ROM, and eDRAM at the cell, array, and peripheral circuit levels
- Ensure every layout meets foundry process design rules and memory-specific constraints, resolving DRC and LVS issues
- Optimize layouts for area efficiency, performance targets, power consumption, yield improvement, and manufacturability
- Perform RC extraction and parasitic analysis on dense memory arrays, then iterate to improve signal integrity and timing margins
- Debug complex layout issues including electromigration, IR drop, and soft error susceptibility with reliability teams
- Mentor junior layout engineers on best practices, tool usage, and design tradeoffs
What you'll need
- Bachelor's or Master's degree in Electronics Engineering, Telecommunication, Physics, or a related technical field
- At least 5 years of hands-on experience in custom layout design with significant focus on memory structures like SRAM, ROM, or eDRAM
- Deep expertise in memory layout at the transistor and cell level, including array structures, sense amplifiers, decoders, and peripheral circuits
- Proficiency with layout tools such as Custom Compiler, Virtuoso, or IC Compiler for physical design and verification
- Strong working knowledge of foundry process design rules, DRC/LVS verification flows, and memory-specific layout constraints
- Experience performing RC extraction, analyzing parasitic effects, and iterating layouts to meet signal integrity requirements
Skills: memory layout, SRAM, ROM, eDRAM, DRC/LVS, Custom Compiler, Virtuoso
This role has been open 121 days — well above the 69-day median for Memory Design roles.
Memory Design · Memory Design
|
Open roles in category
287
|
Median days open
69 d
|
Median salary
$205k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Synopsys | All employers we track in this specialty (287 roles · 29 employers) |
|---|---|---|
| Open roles in this specialty | 27 | 287 |
| Median days open | 49 d | 69 d (−20 d vs this employer) |
| Median salary (USD postings) | — | $205k |
Skills observed across this category: memory layout, SRAM, ROM, eDRAM, DRC/LVS, Custom Compiler
Who's hiring in this category
- Micron Technology · 151 open roles · median 86 d
- Synopsys (this employer) · 27 open roles · median 49 d
- SanDisk · 17 open roles · median 32 d
- Broadcom · 16 open roles · median 50 d
- Qualcomm · 12 open roles · median 149 d
- NVIDIA · 7 open roles · median 59 d
How we counted: 287 open Memory Design (Memory Design) roles from 29 employers tracked in the SemiconductorJobs index, counted 5 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.