IP Logic Design Engineer - Rancho Cordova, United States
$105,440 - $164,800 USD yearly
Originally posted 26 August 2026 by the employer.
This role focuses on 3D NAND flash memory components.
About the role
This role involves designing and verifying logic and circuit blocks for 3D NAND flash memory components. You will contribute to architecture and pathfinding for 3D NAND technology.
What you'll do
- Architect, design, and verify logic and circuit blocks for 3D NAND flash memory components.
- Define micro-architecture specifications, implement RTL in SystemVerilog, and perform static timing analysis.
- Develop and optimize microcode-based 3D NAND algorithms using proprietary instruction sets.
- Collaborate with pre-silicon verification teams to build unit-level test benches and run full-chip RTL and gate-level simulation regressions.
- Review pre-silicon analog and mixed signal simulations and post-silicon microprobe waveforms.
- Partner with product engineering to define Read-Window-Budget features and develop Design for Testability methods.
What you'll need
- MS in electrical or computer engineering with 7+ years of experience, or BS with 9+ years of experience.
- Expertise in Verilog and SystemVerilog, with understanding of ASIC design flow: RTL design, logic synthesis, STA, ECO.
- Experience with lint tools, CDC/RDC analysis, and timing constraints.
- Strong background in design verification tools and automation scripting.
- Ability to work independently across pre- and post-silicon debug cycles.
Skills: 3D NAND flash memory, RTL in SystemVerilog, micro-architecture, logic synthesis, static timing analysis
This role has been open 39 days — well below the 69-day median for Memory Design roles.
Memory Design · Memory Design
|
Open roles in category
287
|
Median days open
69 d
|
Median salary
$205k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Solidigm | All employers we track in this specialty (287 roles · 29 employers) |
|---|---|---|
| Open roles in this specialty | 5 | 287 |
| Median days open | 27 d | 69 d (−42 d vs this employer) |
| Median salary (USD postings) | — | $205k |
Skills observed across this category: 3D NAND flash memory, RTL in SystemVerilog, micro-architecture, logic synthesis, static timing analysis
Who's hiring in this category
- Micron Technology · 151 open roles · median 86 d
- Synopsys · 27 open roles · median 49 d
- SanDisk · 17 open roles · median 32 d
- Broadcom · 16 open roles · median 50 d
- Qualcomm · 12 open roles · median 149 d
- NVIDIA · 7 open roles · median 59 d
How we counted: 287 open Memory Design (Memory Design) roles from 29 employers tracked in the SemiconductorJobs index, counted 5 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.