Intern, RTL Power Macromodeling Engineer - San Jose, California, United States
Originally posted 28 October 2026 by the employer.
About the role
As an intern in Samsung's Power & Thermal Lab, you will build and validate power models that drive a trace-driven power and thermal simulator for AI memory components.
What you'll do
- Develop IP-level power macromodels for AI memory components such as PHY, memory controller, interconnect, and TSV using analytical models, lookup tables, FSMs, neural networks, and hybrid approaches. - Extract activity, value, and state-dependent power features from RTL, SystemC, and C simulations. - Support model calibration with synthesis-assisted anchors, circuit-level references, and measured silicon data. - Validate macromodels against RTL and gate-level power analysis and silicon measurements. - Deliver validated models and regression checks into the trace-driven flow while interfacing with software engineers.
What you'll need
- Currently enrolled in an MS or PhD program in Electrical and Computer Engineering, Computer Science, or a related field, with at least 1 academic quarter or semester remaining. - RTL design and analysis experience using Verilog, SystemVerilog, or SystemC. - Solid programming skills in C++ or Python. - Understanding of dynamic and leakage power in CMOS and interconnect, with the ability to abstract circuit behavior into compact models.
Nice to have
- Experience with power analysis tools such as PrimeTime PX, StarRC, VCS, or PowerArtist. - Experience with architecture-level modeling tools such as McPAT, CACTI, or Wattch. - Familiarity with S-parameters, SPICE, UCIe, high-speed I/O, or 2.5D packaging.
This role has been open 0 days — well below the 64-day median for Digital/RTL Design roles.
Digital/RTL Design · RTL Design
|
Open roles in category
1079
|
Median days open
64 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | Samsung Semiconductor | All employers we track in this specialty (1079 roles · 103 employers) |
|---|---|---|
| Open roles in this specialty | 4 | 1079 |
| Open roles in the wider Digital Design & Verification family | 15 | 3375 · 116 employers |
| Median days open | 68 d | 64 d (+4 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Who's hiring in this category
- Qualcomm · 152 open roles · median 64 d
- Synopsys · 85 open roles · median 41 d
- AMD · 81 open roles · median 42 d
- Analog Devices · 49 open roles · median 57 d
- NXP Semiconductors · 43 open roles · median 97 d
- NVIDIA · 37 open roles · median 47 d
How we counted: 1079 open Digital/RTL Design (RTL Design) roles from 103 employers tracked in the SemiconductorJobs index, counted 28 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.