Intern, ML Compiler (Kernel Auto-Tuning)
Build a cost-model-guided auto-tuning framework for PyTorch and Triton kernels on Samsung’s compute-near-memory AI accelerator.
Originally posted 13 November 2026 by the employer.
About the role
This internship role focuses on building a cost-model-guided auto-tuning framework for PyTorch and Triton kernels on Samsung’s compute-near-memory AI accelerator. You will integrate the tuner with torch.compile Inductor autotuning paths and measure performance gains on LLM inference kernels.
What you'll do
- Design a search space for Triton kernel configurations on the accelerator, covering tile sizes, launch-grid mapping, on-chip buffer budgets, and load style.
- Build legality rules with compiler engineers to prune configurations that fail compilation or exceed on-chip memory limits.
- Develop a kernel cost model calibrated against simulation and profiling data to rank candidate configurations.
- Build a benchmarking harness and persistent tuning cache, integrating the tuner with Triton's autotuner and the torch.compile Inductor autotuning path.
- Extend tuning to data placement to optimize kernels for specific tensor layouts and export tuned costs for placement passes.
- Measure kernel-level and end-to-end LLM inference gains on simulators and hardware, sharing findings in presentations and technical syncs.
What you'll need
- Currently pursuing a Master's or PhD in Computer Science, Computer Engineering, or Electrical Engineering, with at least 1 academic quarter/semester remaining.
- Strong Python and C++ programming skills.
- Experience writing or tuning Triton kernels or working with PyTorch compiler internals such as torch.compile, FX, or Inductor.
- Grounding in compiler fundamentals and performance engineering, including IR and passes, cost models, roofline analysis, and profiling.
Nice to have
- PhD in Computer Science, Computer Engineering, or Electrical Engineering.
- Experience with auto-tuning or auto-sharding frameworks (e.g., TVM/Ansor, Halide autoscheduler, Kernel Tuner, Alpa, GSPMD) or search methods such as Bayesian optimization or ILP.
- Experience with MLIR/LLVM back ends, scratchpad or near-memory architectures, or LLM inference kernels.
- Publications or open-source PyTorch/Triton contributions.
More semiconductor jobs: Samsung Semiconductor jobs · Embedded software jobs · San Jose jobs
First seen in our index 0 days ago, well below the 65-day median for Systems Software Engineering roles.
Systems Software Engineering · Systems Software
|
Open roles in category
713
|
Median days since first seen
65 d
|
Category median salary (all employers)
$220k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | Samsung Semiconductor | All employers we track in this specialty (713 roles · 75 employers) |
|---|---|---|
| Open roles in this specialty | 2 | 713 |
| Open roles in the wider Software, Firmware & Systems family | 20 | 6718 · 161 employers |
| Median days since first seen | 8 d | 65 d (+57 d vs this employer) |
| Median salary (USD postings) | n/a | $220k |
Who's hiring in this category
- NVIDIA · 172 open roles · median 58 d
- Qualcomm · 169 open roles · median 80 d
- AMD · 60 open roles · median 55 d
- Arm Holdings · 33 open roles · median 16 d
- Mobileye · 25 open roles · median 98 d
- Intel Corporation · 16 open roles · median 23 d
How we counted: 713 open Systems Software Engineering (Systems Software) roles from 75 employers tracked in the SemiconductorJobs index, counted 13 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there, and is counted in the wider Software, Firmware & Systems family row. Days are counted from when our index first saw each posting, not from the employer's original posting date.