Intern - ATE Process Engineer ID1 - Boise, ID - Main Site, United States
Originally posted 1 October 2026 by the employer.
About the role
This role supports process optimization, yield improvement, and cost reduction within a high-volume fab environment. The focus is on applying AI to improve wafer output, stability, and performance.
What you'll do
- Analyze manufacturing data and apply SPC, FDC, and 8D methodologies alongside AI Assisted analytics to improve yield, reduce defects, and enhance tool availability.
- Investigate process excursions and use AI, including LLMs and Generative AI tools, to identify trends, perform root-cause analysis, and recommend corrective actions.
- Collaborate with multi-functional teams to optimize wafer processing using AI-Enabled and data-driven decision-making approaches.
- Implement process improvement projects focused on increasing wafer outs, using AI and visualization tools to enhance process capability and efficiency.
- Maintain and update process documentation, integrating insights generated from Artificial Intelligence and standard engineering practices.
What you'll need
- Currently pursuing a STEM degree with an expected graduation between May–June 2027.
- Ability to work approximately 20 hours per week on-site in Boise, ID for 6–8 months (September 2026–May/June 2027 preferred).
- Foundational knowledge of Statistical Process Control (SPC) and Design of Experiments (DOE).
- Experience with programming or analytics tools (e.g., Python, MATLAB, Tableau, Java, or Microsoft Suite).
- Exposure to using AI or applying AI (e.g., AI Assistants, LLMs, or AI Supported analytics) for data analysis or engineering problem-solving.
Nice to have
- Experience with data collection systems, data cleansing, database querying, and AI Supported data workflows.
- Hands-on experience with Generative AI, LLMs, or Agentic AI solutions in academic or project settings.
- Understanding of semiconductor fabrication processes and how AI-Enabled solutions can improve manufacturing performance.
Skills: manufacturing data, SPC, yield, defects, root-cause analysis, process improvement
This role has been open 14 days — well below the 53-day median for Yield Engineering roles.
Yield Engineering · Yield Engineering
|
Open roles in category
221
|
Median days open
53 d
|
Median salary
$134k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Micron Technology | All employers we track in this specialty (221 roles · 36 employers) |
|---|---|---|
| Open roles in this specialty | 114 | 221 |
| Median days open | 57 d | 53 d (+4 d vs this employer) |
| Median salary (USD postings) | — | $134k |
Skills observed across this category: manufacturing data, SPC, yield, defects, root-cause analysis, process improvement
Who's hiring in this category
- Micron Technology (this employer) · 114 open roles · median 57 d
- Intel Corporation · 13 open roles · median 15 d
- GlobalFoundries · 9 open roles · median 212 d
- Skyworks · 8 open roles · median 50 d
- STMicroelectronics · 8 open roles · median 35 d
- Qualcomm · 6 open roles · median 129 d
How we counted: 221 open Yield Engineering (Yield Engineering) roles from 36 employers tracked in the SemiconductorJobs index, counted 16 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.