Interconnect Performance Engineer - TX, Austin, United States
Originally posted 2 September 2026 by the employer.
Work on the Infinity Fabric Interconnect and memory system, foundational technologies across AMD’s product portfolio.
About the role
This role focuses on interconnect, memory system, and simulation-driven performance validation for the Infinity Fabric memory system.
What you'll do
- Perform RTL performance analysis and verification for the Infinity Fabric Interconnect.
- Provide technical leadership while collaborating with architecture, design, and modeling teams on high-performance SoC memory system designs.
- Execute performance verification plans at the IP level and support SoC-level performance debug using simulation and emulation environments.
- Conduct theoretical analysis of memory system optimizations; develop, run, and analyze benchmarks in simulation and/or emulation environments.
- Debug performance failures, identify design bottlenecks, and propose data-driven architectural or RTL solutions.
- Leverage AI-based tools and automation to improve engineering productivity and performance analysis workflows.
What you'll need
- Deep expertise in hardware simulation and system level performance analysis/verification.
- Strong system-level performance debug experience across complex IP interactions, including CPU, GPU, and I/O workloads.
- Deep understanding of memory system architecture and interconnect design.
- Excellent knowledge of Verilog and SystemVerilog.
- Working knowledge of C, C++, and a scripting language such as Python or Perl.
- Solid understanding of multiprocessor coherency, memory ordering, I/O ordering, interrupts, MMU, and cache architectures.
Nice to have
- Proven experience in RTL performance analysis and debug using hardware simulation/emulation platforms.
- Hands-on experience with simulation testbench bring-up, configuration, and development of new performance test cases.
- BS, MS, or PhD degree in Electrical or Computer Engineering.
Skills: Infinity Fabric Interconnect, RTL performance analysis, memory system architecture, multiprocessor coherency, hardware simulation
This role has been open 42 days — well below the 79-day median for SoC/Chip Architecture roles.
SoC/Chip Architecture · SOC Architecture
|
Open roles in category
470
|
Median days open
79 d
|
Median salary
$235k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | AMD | All employers we track in this specialty (470 roles · 65 employers) |
|---|---|---|
| Open roles in this specialty | 35 | 470 |
| Open roles in the wider Digital Design & Verification family | 255 | 3187 · 115 employers |
| Median days open | 64 d | 79 d (−15 d vs this employer) |
| Median salary (USD postings) | — | $235k |
Skills observed across this category: Infinity Fabric Interconnect, RTL performance analysis, memory system architecture, multiprocessor coherency, hardware simulation
Who's hiring in this category
- Qualcomm · 72 open roles · median 86 d
- NVIDIA · 56 open roles · median 68 d
- Apple · 39 open roles · median 9 d
- AMD (this employer) · 35 open roles · median 64 d
- Arm Holdings · 27 open roles · median 112 d
- NXP Semiconductors · 21 open roles · median 114 d
How we counted: 470 open SoC/Chip Architecture (SOC Architecture) roles from 65 employers tracked in the SemiconductorJobs index, counted 15 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.