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NVIDIA

High Speed SerDes Validation Engineer - New College Grad 2026 - CA, Santa Clara, United States

NVIDIA US, CA, Santa Clara, United States 4 days ago
Verification, Validation & Test

$100,000 - $189,750 USD yearly

Originally posted 6 October 2026 by the employer.

The DGX Server Product Engineering Team is seeking a Validation Engineer.

About the role

This role focuses on the validation of high-speed SerDes and IO within these systems.

What you'll do

  • Own validation from test plan development, automation, and design for validation to resource planning, coverage metrics, and bug resolution.
  • Collaborate with ODMs, component suppliers, and QA teams to ensure comprehensive test coverage.
  • Coordinate internal and external teams across different time zones.
  • Develop system level stress and performance testing strategies using Deep Learning/AI applications.

What you'll need

  • Recently completed a BS, MS, or PhD in EE, CE, or a related field.
  • Ability to work on site in a hardware lab environment 5 days a week.
  • Experience in validating and debugging complex systems.
  • Experience developing/running real world workload and factory diagnosis tools.
  • Familiarity with lab instrumentation like Oscilloscopes.
  • High-speed IO validation and SERDES validation experience (50GBaud/s and above).
  • Strong understanding of DSP-based high-speed SERDES architectures.
  • Coding experience with programming and scripting languages such as C/C++, JS, and Python.

Skills: SERDES validation, high-speed IO, lab instrumentation, system level stress, DSP-based SERDES

Market context

This role has been open 2 days — well below the 41-day median for Post-Silicon Validation roles.

Post-Silicon Validation · Silicon Validation

Open roles in category
401
Median days open
41 d
Median salary
$174k
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
How NVIDIA compares in Post-Silicon Validation hiring
Metric NVIDIA All employers we track in this specialty (401 roles · 63 employers)
Open roles in this specialty 24 401
Open roles in the wider Silicon Validation & Test family 95 2199 · 111 employers
Median days open 20 d 41 d (−21 d vs this employer)
Median salary (USD postings) — $174k

Skills observed across this category: SERDES validation, high-speed IO, lab instrumentation, system level stress, DSP-based SERDES

Who's hiring in this category

  • AMD · 56 open roles · median 51 d
  • Micron Technology · 41 open roles · median 35 d
  • Qualcomm · 33 open roles · median 28 d
  • Graphcore · 22 open roles · median 113 d
  • NVIDIA (this employer) · 21 open roles · median 28 d
  • Microchip Technology · 20 open roles · median 66 d

How we counted: 401 open Post-Silicon Validation (Silicon Validation) roles from 63 employers tracked in the SemiconductorJobs index, counted 9 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.

Apply now
US, CA, Santa Clara, United States
On-site
$100,000 - $189,750 USD yearly
4 days ago

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