High-Speed I/F Subsystem Design Leader - Kodaira, Japan
Analog & Mixed-Signal Design
Originally posted 2 April 2026 by the employer — open 161 days.
About the role
This role involves leading the technical judgment and design policy formulation for high-speed interface subsystem development within automotive SoCs (R-Car series).
What you'll do
- Define specifications and examine architectures for high-speed interface subsystems in automotive SoCs.
- Organize and review design policies for PCIe, UCIe, USB, and UFS subsystems, optimizing for the entire subsystem.
- Participate in logical design and verification phases, addressing technical issues and making design decisions.
- Consider power, performance, and reliability constraints, ensuring consistency with the overall SoC.
- Engage in technical communication with IP vendors to confirm specifications and organize constraint conditions.
- Drive global development by collaborating in English with design centers in India, Vietnam, and IP vendors.
What you'll need
- Practical experience in specification review, design, verification, or performance evaluation in PCIe, UCIe, USB, or UFS.
- Experience organizing design policies and technical issues based on requirements and sharing them with stakeholders.
- Understanding of logical design and verification flows, with active participation in design reviews and technical discussions.
- Ability to contribute to technical consensus through communication with teams and related IP personnel.
- Willingness to engage in technical meetings and specification confirmations in English.
Skills: PCIe, UCIe, USB, UFS, High-Speed Interface, Automotive SoC
Market context
This role has been open 160 days — well above the 91-day median for High-Speed IO/SerDes Design roles.
High-Speed IO/SerDes Design · Serdes Highspeed
|
Open roles in category
217
|
Median days open
91 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Renesas Electronics | All employers we track in this specialty (217 roles · 44 employers) |
|---|---|---|
| Open roles in category | 8 | 217 |
| Median days open | 160 d | 91 d (+69 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Skills observed across this category: PCIe, UCIe, USB, UFS, High-Speed Interface, Automotive SoC
Who's hiring in this category
- AMD · 24 open roles · median 61 d
- Cadence Design Systems · 19 open roles · median 153 d
- Qualcomm · 17 open roles · median 74 d
- Synopsys · 16 open roles · median 53 d
- Broadcom · 11 open roles · median 142 d
- NVIDIA · 10 open roles · median 95 d
How we counted: 217 open High-Speed IO/SerDes Design (Serdes Highspeed) roles from 44 employers tracked in the SemiconductorJobs index, counted 10 Sept 2026. Figures refresh nightly.