$121,800 - $182,600 USD yearly
Originally posted 28 October 2026 by the employer.
About the role
Qualcomm's Mixed-Signal PHY design team is seeking an analog and mixed-signal circuit designer to deliver SerDes PHY designs. The work focuses on transistor-level circuit design and architecture analysis in CMOS process nodes at 7nm and beyond.
What you'll do
- Deliver analog and mixed-signal transistor-level circuit designs for high-speed, low-power PHY SerDes blocks.
- Supervise block-level physical layout with layout teams.
- Contribute to architecture and circuit designs for one or more blocks and participate in design reviews.
- Define and execute simulations and analyses covering power and performance to evaluate and verify designs.
- Program and run tests to identify and debug circuit issues, escalating highly complex problems when necessary.
- Write detailed technical documentation and design descriptions to guide internal and external users.
What you'll need
- Bachelor's degree in Electrical Engineering with 2+ years of experience in analog or mixed-signal integrated circuit design in nanometer planar CMOS or FinFET, plus 2+ years of ASIC design or verification experience (or a Master's degree with 2+ years of ASIC design/verification experience, or a PhD in Electrical Engineering or a related field).
- 2+ years of experience using design tools such as CADENCE, SPICE, MATLAB, Verilog, or VHDL.
- Experience delivering transistor-level circuit designs and interfacing with layout teams.
Nice to have
- PhD in Electrical Engineering or a related field.
- 2 years of experience in analog/mixed-signal integrated CMOS circuit design for high-speed SERDES, high speed DDR PHYs, VCO, PLL, DLL design, Audio CODEC and Class D Audio amplifiers, Delta-Sigma, SAR ADCs, or Current-Steering DACs.
- Experience with >32Gbps transceiver or clocking design.
Skills: SerDes, Transceiver, PHY, CMOS, Cadence, SPICE
More semiconductor jobs: Qualcomm jobs · Signal integrity jobs · San Diego jobs
First seen in our index 14 days ago, well below the 58-day median for High-Speed IO/SerDes Design roles.
High-Speed IO/SerDes Design · Serdes Highspeed
|
Open roles in category
262
|
Median days since first seen
58 d
|
Category median salary (all employers)
$206k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Qualcomm | All employers we track in this specialty (262 roles · 53 employers) |
|---|---|---|
| Open roles in this specialty | 20 | 262 |
| Open roles in the wider Analog & Mixed-Signal family | 79 | 1547 · 118 employers |
| Median days since first seen | 85 d | 58 d (−27 d vs this employer) |
| Median salary (USD postings) | n/a | $206k |
Skills observed across this category: SerDes, Transceiver, PHY, CMOS, Cadence, SPICE
Who's hiring in this category
- Synopsys · 41 open roles · median 41 d
- AMD · 21 open roles · median 45 d
- Cadence Design Systems · 21 open roles · median 157 d
- Qualcomm (this employer) · 20 open roles · median 86 d
- NVIDIA · 18 open roles · median 218 d
- Micron Technology · 11 open roles · median 51 d
How we counted: 262 open High-Speed IO/SerDes Design (Serdes Highspeed) roles from 53 employers tracked in the SemiconductorJobs index, counted 13 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there, and is counted in the wider Analog & Mixed-Signal family row. Days are counted from when our index first saw each posting, not from the employer's original posting date.