High-Bandwidth Memory (HBM) System Validation Lead (AI Accelerator Platform)
Qualcomm
San Diego, California, United States of America; Austin, Texas, United States of America, United States
5 days ago
Verification, Validation & Test
$174,400 - $261,600 USD yearly
Originally posted 5 October 2026 by the employer.
This role focuses on validation strategies for custom high-bandwidth memory subsystems integrated with large-scale AI compute platforms.
About the role
This role involves defining and executing validation strategies for custom high-bandwidth memory subsystems integrated with large-scale AI compute platforms.
What you'll do
- Own end-to-end HBM validation strategy from emulation through production silicon.
- Develop comprehensive validation plans covering memory initialization, training flows, power-state transitions, reliability testing, error recovery mechanisms, and manufacturing diagnostics.
- Drive pre-silicon memory bring-up and first-silicon memory bring-up and root-cause analysis of failures.
- Validate interaction between HBM, AI accelerators, compute fabrics, cache hierarchy, and NoC infrastructure.
- Lead complex silicon debug efforts and analyze crashes, hangs, data corruption, training failures, and performance bottlenecks.
- Develop scalable automation frameworks for memory validation and build telemetry, analytics, debug, and performance-monitoring tools.
What you'll need
- 8 years of experience in memory validation, silicon validation, or platform bring-up.
- Strong understanding of DDR4/DDR5/LPDDR5/LPDDR6 architectures, HBM technologies, memory controllers, PHY architectures, and cache and coherency systems.
- Experience with pre-silicon validation, FPGA platforms, and post-silicon bring-up.
- Strong debugging skills using logic analyzers, protocol analyzers, performance counters, and firmware traces.
- Programming experience in Python and C/C++.
Nice to have
- Prior experience validating HBM2, HBM3, HBM3E, or advanced stacked-memory technologies.
- Experience with AI accelerator, GPU, HPC, or server-class platforms.
- Familiarity with NoCs, chiplets, and coherent interconnects.
- Knowledge of Signal Integrity (SI), Power Integrity (PI), thermal characterization, and package-level interactions.
- Experience defining validation methodologies for first-generation memory technologies.
Skills: HBM validation, memory bring-up, post-silicon validation, AI accelerator platform, debug