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Astera Labs

Hardware Lab Engineer - San Jose, California, United States

Astera Labs San Jose, California, United States 7 months ago
Verification, Validation & Test

$160,000 - $200,000 USD yearly

Originally posted 2 April 2026 by the employer.

About the role

This role works closely with firmware, system validation, quality, and product engineers to support silicon bring-up, characterization, and debug activities through hands-on lab execution. Testing covers silicon devices across high-speed interfaces including PCIe Gen5/6/7, CXL, and Ethernet.

What you'll do

- Setup and maintain test environments for silicon validation and characterization, configure hardware, software, firmware, and applications, and replicate BKCs. - Conduct hands-on testing of silicon devices including PCIe Gen5/6/7, CXL, Ethernet, and other high-speed interfaces. - Install and configure servers, including FW, BIOS, OS, and network. - Execute RMA intake and triage through inspection, electrical verification, screening (including CSAM inspection), and prioritization. - Manage logistics and communications with external labs, and organize, track, and distribute lab equipment, hardware, and peripherals. - Perform ad hoc PCBA rework and soldering of fine-pitch SMD components, while developing and documenting lab procedures.

What you'll need

- Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field. - 5-12+ years of hands-on experience in lab environments supporting silicon validation or hardware development. - Proficiency with high-speed test equipment, including oscilloscopes, protocol analyzers, BERTs, and multimeters. - Experience with high-speed interface testing involving PCIe, CXL, DDR, Ethernet, or SerDes. - Programming skills in Python for test automation, along with familiarity with Linux operating systems and command-line tools. - Demonstrated experience coordinating with third-party testing laboratories and managing logistics, including sample shipping, chain of custody, and scheduling. - Experience managing multiple RMA cases simultaneously and prioritizing based on severity and impact.

Nice to have

- Experience with post-silicon validation of ASICs, SoCs, or Retimer/PHY products. - Knowledge of analog/mixed-signal circuit testing and debugging techniques. - Experience with JTAG, I2C, SPI, and other embedded interfaces. - Familiarity with PCB design, schematic reading, and signal integrity concepts. - Knowledge of data center systems architecture including servers, AI platforms, and networking equipment. - Understanding of ATE (Automated Test Equipment) systems and production test methodologies. - Experience with defect screening methodologies including visual inspection, electrical testing, and acoustic imaging. - Experience with complete RMA lifecycle management from intake through root cause analysis and corrective action. - Knowledge of common semiconductor failure modes and failure analysis techniques, including die attach inspection, delamination detection, void analysis, and crack identification. - Experience with formal compliance testing and industry standards.

Skills: silicon bring-up, high-speed test equipment, PCIe, CXL, post-silicon validation

Market context

This role has been open 205 days — well above the 43-day median for Post-Silicon Validation roles.

Post-Silicon Validation · Silicon Validation

Open roles in category
429
Median days open
43 d
Median salary
$167k
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
How Astera Labs compares in Post-Silicon Validation hiring
Metric Astera Labs All employers we track in this specialty (429 roles · 62 employers)
Open roles in this specialty 9 429
Open roles in the wider Silicon Validation & Test family 19 2235 · 112 employers
Median days open 111 d 43 d (+68 d vs this employer)
Median salary (USD postings) — $167k

Skills observed across this category: silicon bring-up, high-speed test equipment, PCIe, CXL, post-silicon validation

Who's hiring in this category

  • AMD · 54 open roles · median 45 d
  • Qualcomm · 38 open roles · median 32 d
  • Micron Technology · 36 open roles · median 41 d
  • NVIDIA · 24 open roles · median 26 d
  • Microchip Technology · 22 open roles · median 77 d
  • Apple · 20 open roles · median 4 d

How we counted: 429 open Post-Silicon Validation (Silicon Validation) roles from 62 employers tracked in the SemiconductorJobs index, counted 26 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.

Apply now
San Jose, California, United States
On-site
$160,000 - $200,000 USD yearly
7 months ago

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