Hardware (CPU, GPU, SoC, Digital Design, DV) Engineering Internship – Summer 2027
Originally posted 18 September 2026 by the employer — open 2 days.
About the role
This internship involves working on one of Qualcomm's multi-disciplinary teams focused on System, Front-end Design, Implementation, Design-for-Test (DFT), Physical Design, Pre-silicon Verification (DV), Emulation, Post-silicon Validation (VI), CAD, or GPU Design. This role supports multiple technical tracks including GPU Engineering, CPU Engineering, Digital Design / DV, and SoC Systems Engineering.
What you'll do
- Contribute to engineering design and development in MSM SOC and chipset architecture.
- Perform GPU pipeline validation including stimulus generators, checkers, monitors, drivers, and models.
- Validate CPU and SOC-level micro-architecture concepts.
- Develop test and coverage plans, verification methodology, and scalable environments.
- Perform RTL development for modem physical and MAC layer processing.
- Develop verification components using SystemVerilog and UVM.
- Model cellular modem datapaths for bit-exact correctness.
- Support system-level performance modeling and simulation.
What you'll need
- Currently enrolled in a bachelor’s, master’s, or Ph.D. degree program in computer engineering, computer science, electrical engineering, or a related field.
- Availability for 11–14 weeks during Summer 2027 (May–September).
- Expected graduation date of November 2027 or later.
- 1 year of academic experience with programming languages such as C, C++, Python, Perl, Verilog, SystemVerilog.
Nice to have
- Currently pursuing a degree with an anticipated graduation between November 2027 and June 2028.
- Currently enrolled in a Master’s or PhD degree program in computer engineering, electrical engineering, or a related field.
- Experience with Graphics power analysis & optimization (Vulkan).
- Familiarity with multimedia or communication technologies including audio/video codecs, camera, WLAN, LTE, and 5G.
- Familiarity with simulators, coverage tools, waveform viewers.
- Knowledge of digital design, DSP, wireless communication, LTE, 5G, Wi-Fi.
- Exposure to machine learning concepts as applied to digital signal processing or modem architecture.
- Understanding of concepts in computer architecture (CPU, GPU, DSP, interconnects, MMUs).
- Experience supporting or optimizing machine learning workloads on embedded systems or accelerators.
- Programming experience in C/C++, Python; scripting and profiling tools.
This role has been open 1 day — well below the 61-day median for Digital/RTL Design roles.
Digital/RTL Design · RTL Design
|
Open roles in category
938
|
Median days open
61 d
|
Median salary
$184k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | Qualcomm | All employers we track in this specialty (938 roles · 101 employers) |
|---|---|---|
| Open roles in this specialty | 143 | 938 |
| Open roles in the wider Digital Design & Verification family | 375 | 3011 · 114 employers |
| Median days open | 53 d | 61 d (−8 d vs this employer) |
| Median salary (USD postings) | — | $184k |
Who's hiring in this category
- Qualcomm (this employer) · 143 open roles · median 53 d
- AMD · 61 open roles · median 61 d
- Synopsys · 57 open roles · median 29 d
- NXP Semiconductors · 51 open roles · median 67 d
- NVIDIA · 48 open roles · median 44 d
- Analog Devices · 39 open roles · median 73 d
How we counted: 938 open Digital/RTL Design (RTL Design) roles from 101 employers tracked in the SemiconductorJobs index, counted 20 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.