GPU Validation and Emulation Engineer, Senior

Originally posted 14 July 2026 by the employer.

Compile and validate GPU Verilog RTL models on hardware emulators including Veloce, Palladium, and ZeBu, as well as FPGA platforms.

About the role

As a GPU Validation and Emulation Engineer at Qualcomm, you will synthesize Verilog RTL, create models, and compile designs to hardware emulators and FPGA platforms. The role supports GPU core implementation with an emphasis on design partitioning, timing analysis, run-time performance, and post-silicon debug.

What you'll do

- Synthesize Verilog RTL, create models, and compile them to emulators such as Veloce, Palladium, ZeBu, and FPGA platforms. - Develop hardware emulator implementation, focusing on design partitioning, synthesis, place and route, timing analysis, and run-time performance. - Drive failure debug on emulators and collaborate with design and software driver teams on testplans and debugging. - Work with EDA tool vendors to enhance methodologies and improve area and performance of synthesized FPGA RTL. - Perform system-level RTL simulation, design verification, third-party IP integration, and debug functional and timing models. - Support chip bring up and post silicon debug.

What you'll need

- Bachelor's degree in Computer Engineering, Computer Science, Electrical Engineering, or related field with 2+ years of Software Engineering, Hardware Engineering, Systems Engineering, or related work experience (or Master's degree with 1+ year, or a PhD). - Practical experience in hardware engineering, systems engineering, or software engineering.

Nice to have

- 1+ years of hands-on experience in emulation, simulation acceleration, or FPGA prototyping. - Hands-on experience with hardware emulators such as Palladium, ZeBu, or Veloce, or FPGA systems based on Xilinx or Altera FPGAs. - Experience in design validation, post-silicon debug, platform bringup, and waveform viewers. - Experience with emulation methodologies including in-circuit emulation, hybrid systems, or simulation acceleration. - Design verification knowledge in UVM or SystemVerilog, alongside Verilog experience. - Knowledge of GPU, CPU, DDR, and bus architectures. - Programming skills in C and C++, and scripting skills in Python, Tcl, or Perl. - Familiarity with vendor emulation tools, Xilinx tools, and synthesis tools.

Skills: FPGA, emulators, Verilog RTL, synthesis, debug, design verification