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Qualcomm

GPU Power Engineer

Qualcomm San Diego, California, United States of America, United States 2 days ago
Digital Design & SoC Architecture

$141,300 - $211,900 USD yearly

Originally posted 8 October 2026 by the employer.

About the role

This role involves analyzing GPU architecture and workloads to optimize performance and power consumption. You will contribute to GPU power modeling, estimation, and workload characterization.

What you'll do

  • Analyze and evaluate GPU architecture/microarchitecture and workload for performance and power optimizations.
  • Perform GPU power modeling and estimation for projection and correlation.
  • Conduct GPU workload analysis, profiling, and characterizations.
  • Develop and maintain tests for pre-silicon and post-silicon power verifications.
  • Collaborate with RTL design, architecture, design verification, compiler, driver, silicon implementation, and post-silicon teams.

What you'll need

  • Bachelor's degree in Computer Engineering, Computer Science, Electrical Engineering, or related field.
  • Experience with scripting in Python or Perl.
  • 5 years of experience with low-power ASIC optimization.
  • 2+ years of Software Engineering, Hardware Engineering, Systems Engineering, or related work experience.

Nice to have

  • Master's or PhD degree in Computer Engineering, Computer Science, Electrical Engineering, or related field.
  • 8 years of experience with advanced CPU/GPU architecture/microarchitecture design development.
  • 8 years of experience with VLSI design and verification.
  • 8 years of experience with low-power ASIC design techniques.
  • Experience with industry tools such as PrimeTime PX and Power Artist.
  • Experience with Vulkan, DirectX3D, OpenGL, OpenCL, or Cuda development.
  • Experience with GPU driver and compiler development.
  • Knowledge of Graphics architecture.

Skills: low-power ASIC optimization, GPU architecture/microarchitecture, VLSI design and verification, PrimeTime PX, Power Artist

Market context

This role has been open 0 days — well below the 62-day median for Digital/RTL Design roles.

Digital/RTL Design · RTL Design

Open roles in category
1010
Median days open
62 d
Median salary
$185k
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
How Qualcomm compares in Digital/RTL Design hiring
Metric Qualcomm All employers we track in this specialty (1010 roles · 97 employers)
Open roles in this specialty 143 1010
Open roles in the wider Digital Design & Verification family 399 3195 · 113 employers
Median days open 60 d 62 d (−2 d vs this employer)
Median salary (USD postings) — $185k

Skills observed across this category: low-power ASIC optimization, GPU architecture/microarchitecture, VLSI design and verification, PrimeTime PX, Power Artist

Who's hiring in this category

  • Qualcomm (this employer) · 143 open roles · median 60 d
  • Synopsys · 82 open roles · median 24 d
  • AMD · 73 open roles · median 35 d
  • Analog Devices · 48 open roles · median 40 d
  • NXP Semiconductors · 48 open roles · median 77 d
  • NVIDIA · 45 open roles · median 63 d

How we counted: 1010 open Digital/RTL Design (RTL Design) roles from 97 employers tracked in the SemiconductorJobs index, counted 9 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.

Apply now
San Diego, California, United States of America, United States
On-site
$141,300 - $211,900 USD yearly
2 days ago

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