$119,400 - $179,200 USD yearly
Originally posted 1 October 2026 by the employer.
This role focuses on GPU hardware and Graphics IP verification.
About the role
This role is responsible for the verification of Graphics IP, ensuring performance and power goals are met for GPU cores.
What you'll do
- Create and maintain verification test benches and environments in System Verilog/UVM.
- Collaborate with Architecture, Software, Firmware, Design, Modeling, Emulation, and Post-silicon validation teams to define and develop test methodology and content.
- Participate in GPU architecture and micro-architecture reviews.
- Collect, organize, and execute various forms of system-level test content, including directed test cases, gaming benchmarks, standards compliance test suites, and system-level scenarios.
- Build automation for continuous integration and testing based on the latest GPU IP.
- Write technical documentation and feature descriptions for projects.
What you'll need
- Bachelor's degree in Computer Engineering, Computer Science, Electrical Engineering, or related field.
- System Verilog, UVM, Verilog or VHDL, C/C++ skills.
- Constrained random, Functional Coverage development, and design debug experience.
Nice to have
- 1+ years Hardware Engineering, Software Engineering, Systems Engineering, or related work experience.
- Exposure to Emulation/Prototyping Platforms (Veloce, Palladium, Zebu, FPGA).
- Master's Degree in Electrical or Computer Engineering, Computer Science, or related field.
- 1+ years relevant GPU experience.
- Experience in GPU-based verification.
- Experience in system or sub-system level verification.
- Concurrency, Preemption, Stress testing frameworks.
- Testbench Architecture and Implementation.
- GFX API Exposure: Vulkan/DX11/DX12 Exposure.
- Scripting and automation skills (Python, Make, Airflow etc).
- Embedded FW Development and Debugging.
- Benchmarking and Performance Analysis.
- Windows and/or Linux OS Kernel Architecture.
- C/C++, GNU Toolchain, Visual Studio.
- Formal verification - FPV and DPV experience.
- Experience with emulation/prototyping/hybrid build and execution flows (Veloce, Palladium, Zebu, Protium, HAPS, qemu).
- Development of synthesizable transactors, monitors, scoreboards for emulation platforms.
- Embedded FW and/or Kernel level development and debugging skills (C/C++, Makefile, gdb, uboot, uefi, kernel-mode drivers).
Skills: GPU hardware, System Verilog/UVM, test benches, constrained random, functional coverage
This role has been open 14 days — well below the 64-day median for Design Verification roles.
Design Verification · Design Verification
|
Open roles in category
1195
|
Median days open
64 d
|
Median salary
$186k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Qualcomm | All employers we track in this specialty (1195 roles · 95 employers) |
|---|---|---|
| Open roles in this specialty | 110 | 1195 |
| Open roles in the wider Digital Design & Verification family | 380 | 3204 · 115 employers |
| Median days open | 37 d | 64 d (−27 d vs this employer) |
| Median salary (USD postings) | — | $186k |
Skills observed across this category: GPU hardware, System Verilog/UVM, test benches, constrained random, functional coverage
Who's hiring in this category
- Qualcomm (this employer) · 109 open roles · median 37 d
- AMD · 97 open roles · median 51 d
- NVIDIA · 84 open roles · median 58 d
- Synopsys · 63 open roles · median 31 d
- SiFive · 55 open roles · median 73 d
- Arm Holdings · 49 open roles · median 101 d
How we counted: 1195 open Design Verification (Design Verification) roles from 95 employers tracked in the SemiconductorJobs index, counted 16 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.