$195,200 - $292,800 USD yearly
Originally posted 1 September 2026 by the employer.
Design and integrate complex GPU IP with a focus on 2D and 3D graphics, streaming processors, and high-speed IO interfaces.
About the role
This role involves the architecture and micro-architecture of integration-related IP, RTL design and synthesis, logic and timing verification, and the integration of complex IP to form a complete GPU. You will implement graphics processors focusing on 2D and 3D graphics, streaming processors, and high-speed IO interfaces.
What you'll do
- Architect and micro-architect integration related IP for GPU systems.
- Perform RTL design and synthesis for GPU components.
- Conduct logic and timing verification of GPU IP.
- Integrate complex IP to form a complete GPU.
- Collaborate with software, power, and design teams.
What you'll need
- 5 years of ASIC design, verification, or related work experience.
- Strong design experience with SoC and/or IP level integration of design blocks.
- RTL expertise (SystemVerilog) with ability to qualify RTL with frontend design tools such as Lint & CDC.
- Experience in Logic design, micro-architecture, and RTL coding.
- Strong understanding of multi clock design concepts.
- Experience in functional ECO implementation.
- Experience in Synthesis and understanding of timing concepts for ASICs.
Nice to have
- Familiarity with AMBA protocols: AXI, AHB, APB, clocking/reset/debug architecture.
- Expertise in scripting languages such as Python to improve automation.
- GPU and/or multimedia IP development experience.
- Familiarity with low power design.
Skills: GPU ASICS Engineering, RTL design, micro-architecture, logic verification, IP integration
This role has been open 43 days — well below the 63-day median for Digital/RTL Design roles.
Digital/RTL Design · RTL Design
|
Open roles in category
1013
|
Median days open
63 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Qualcomm | All employers we track in this specialty (1013 roles · 101 employers) |
|---|---|---|
| Open roles in this specialty | 134 | 1013 |
| Open roles in the wider Digital Design & Verification family | 372 | 3192 · 115 employers |
| Median days open | 63 d | 63 d (same as this employer) |
| Median salary (USD postings) | — | $185k |
Skills observed across this category: GPU ASICS Engineering, RTL design, micro-architecture, logic verification, IP integration
Who's hiring in this category
- Qualcomm (this employer) · 134 open roles · median 63 d
- Synopsys · 86 open roles · median 28 d
- AMD · 72 open roles · median 34 d
- Analog Devices · 49 open roles · median 46 d
- NVIDIA · 46 open roles · median 62 d
- NXP Semiconductors · 44 open roles · median 87 d
How we counted: 1013 open Digital/RTL Design (RTL Design) roles from 101 employers tracked in the SemiconductorJobs index, counted 14 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.