Functional Safety Architect - Santa Clara, CA, United States

Originally posted 27 July 2026 by the employer.

This role focuses on the functional safety architecture of Physical AI System-on-Chip (SoC).

About the role

As Functional Safety Architect for our Physical AI System-on-Chip (SoC), you will own the functional safety architecture of our silicon, defining how our chips detect, contain, and respond to faults. This role establishes Velaura’s functional safety strategy and lifecycle from the earliest architecture phase through production.

What you'll do

• Own the SoC functional safety architecture: define safety goals, safety mechanisms, and the hardware/software fault-handling strategy across Velaura’s Physical AI silicon roadmap.
• Lead safety analyses—hazard analysis and risk assessment, DFMEA, FMEDA, FTA, and dependent-failure/common-cause analysis—and derive quantitative safety metrics for ISO 26262 ASIL and IEC 61508 SIL.
• Define safety mechanisms for compute, AI/NPU, memory, and interconnect including error detection and correction, lockstep, BIST, and safe-state handling.
• Partner with silicon design, firmware, safety, and platform software teams to embed safety requirements into the RTL, boot flow, and SDK.
• Own the safety case and work products across the safety lifecycle, coordinating with assessors and customers to support certification and audits.
• Manage the interface between functional safety and adjacent disciplines—cybersecurity, reliability, and SOTIF.

What you'll need

• 10+ years in functional safety or safety-critical hardware engineering, with significant experience taking silicon or embedded platforms through a full safety lifecycle.
• Deep expertise with functional safety standards across frameworks—ISO 26262 (including part 11 for semiconductors) up to ASIL D and IEC 61508 up to SIL 3.
• Hands-on experience leading safety analyses (HARA, FMEA/FMEDA, FTA, DFA) and computing hardware architectural metrics (SPFM, LFM, PMHF).
• Strong command of hardware safety mechanisms—ECC, lockstep, BIST, redundancy, and safe-state design.
• Proven ability to build and defend a safety case and to drive safety requirements across multi-disciplinary teams from architecture through production.
• Bachelor’s or advanced degree in Electrical/Computer Engineering, Computer Science, or a related field, or equivalent practical experience.

Nice to have

• Experience with functional safety for AI/ML accelerators or NPUs, and with SOTIF (ISO 21448) for autonomous and perception systems.
• Familiarity with robotics, automotive, industrial, or other safety-critical domains, and with adjacent standards such as ISO/SAE 21434 (cybersecurity).
• Certification such as a recognized Functional Safety Engineer credential.
• Prior experience at an early-stage or high-growth semiconductor or hardware company, building safety functions and processes from the ground up.
• Master’s or Ph.D in Electrical/Computer Engineering, Computer Science, or a related field, or equivalent practical experience.

Skills: SoC functional safety, ISO 26262, ASIL D, FMEDA, safety mechanisms, safety case