Front End Design Verification Engineer - Remote
$100,000 - $500,000 USD yearly
Originally posted 15 September 2026 by the employer.
This role focuses on verifying the fetch unit for high-performance RISC-V CPU cores.
About the role
This role involves verifying the fetch unit for high-performance RISC-V CPU cores, specifically focusing on instruction fetch, prediction, decode, and dispatch. The position contributes to the performance and correctness of an out-of-order CPU.
What you'll do
- Develop verification strategies and create sophisticated tests for the CPU front end.
- Debug complex failures and ensure correct behavior across various workloads and corner cases.
- Work closely with CPU architects and RTL designers.
- Move between specifications, RTL, simulations, and waveforms to identify root causes.
What you'll need
- 6+ years of experience in design verification for CPUs, SoCs, ASICs, or complex digital designs.
- Strong experience with SystemVerilog and UVM, including constrained-random testing, assertions, functional coverage, and testbench development.
- Solid understanding of CPU architecture, including pipelines, instruction fetch/decode, branch prediction, speculative execution, or out-of-order execution.
- Experience debugging RTL and simulation failures using waveforms and standard simulation/debug tools.
- Strong programming skills in C/C++ and/or Python.
Skills: SystemVerilog, UVM, RISC-V CPU, functional coverage, branch prediction
This role has been open 29 days — well below the 65-day median for Design Verification roles.
Design Verification · Design Verification
|
Open roles in category
1192
|
Median days open
65 d
|
Median salary
$186k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Tenstorrent | All employers we track in this specialty (1192 roles · 95 employers) |
|---|---|---|
| Open roles in this specialty | 12 | 1192 |
| Open roles in the wider Digital Design & Verification family | 28 | 3191 · 115 employers |
| Median days open | 141 d | 65 d (+76 d vs this employer) |
| Median salary (USD postings) | — | $186k |
Skills observed across this category: SystemVerilog, UVM, RISC-V CPU, functional coverage, branch prediction
Who's hiring in this category
- Qualcomm · 106 open roles · median 42 d
- AMD · 99 open roles · median 55 d
- NVIDIA · 82 open roles · median 57 d
- Synopsys · 63 open roles · median 30 d
- SiFive · 54 open roles · median 72 d
- Cadence Design Systems · 50 open roles · median 114 d
How we counted: 1192 open Design Verification (Design Verification) roles from 95 employers tracked in the SemiconductorJobs index, counted 15 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.