FPGA Engineer: Physical AI & Robotics - CA, San Jose, United States
Originally posted 17 July 2026 by the employer.
About the role
AMD is seeking an experienced FPGA/Adaptive SoC Applications Design Engineer to define and develop Physical AI platforms built on AMD Adaptive SoCs, Ryzen AI Embedded processors, and AMD FPGA technologies. You will work across hardware, embedded software, and AI acceleration to develop reference designs and proof-of-concepts for intelligent robotics, industrial automation, autonomous machines, and smart vision systems.
What you'll do
- Design and develop FPGA and Adaptive SoC solutions for Physical AI applications including robotics, industrial automation, autonomous systems, and intelligent edge devices. - Create reference architectures, demonstration platforms, and proof-of-concept designs showcasing AMD Adaptive SoC and Ryzen AI Embedded technologies. - Develop FPGA RTL, AI Engine, HLS, and embedded software components using AMD Vivado, Vitis, and Yocto development environments. - Integrate high-speed interfaces including PCIe, Ethernet, DisplayPort, MIPI CSI/DSI, USB, CAN, and industrial communications. - Develop sensor processing pipelines incorporating cameras, radar, LiDAR, IMUs, and other edge sensing technologies. - Support board bring-up, silicon validation, hardware debugging, and system performance optimization on AMD platforms.
What you'll need
- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, Robotics Engineering, or a related technical discipline. - Experience with FPGA RTL, embedded software, and hardware debugging. - Hands-on background with high-speed interface integration such as PCIe, Ethernet, or USB. - Legal authorization to work in the United States without visa sponsorship.
Nice to have
- FPGA development using Verilog, SystemVerilog, or VHDL, including experience with AMD Vivado, Vitis, Vitis HLS, AI Engine, or comparable FPGA development environments. - Embedded software development using C/C++, Embedded Linux, Yocto, RTOS, or bare-metal environments. - Hardware/software co-design, including integration of FPGA accelerators with embedded processors and system-level architectures. - Experience with control systems, motor control, DSP algorithm implementation, AI inference acceleration, or edge AI applications. - Experience developing solutions for robotics, industrial automation, autonomous systems, machine vision, or intelligent edge devices. - Experience integrating sensors and high-speed interfaces, including cameras, LiDAR, radar, PCIe, Ethernet, USB, MIPI, CAN, and related technologies. - Familiarity with Git, CI/CD workflows, and modern software development practices.
This role has been open 95 days — well above the 63-day median for FPGA Design roles.
FPGA Design · RTL Design
|
Open roles in category
102
|
Median days open
63 d
|
Median salary
$163k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | AMD | All employers we track in this specialty (102 roles · 25 employers) |
|---|---|---|
| Open roles in this specialty | 11 | 102 |
| Median days open | 58 d | 63 d (−5 d vs this employer) |
| Median salary (USD postings) | — | $163k |
Who's hiring in this category
- Altera · 31 open roles · median 56 d
- AMD (this employer) · 11 open roles · median 58 d
- Teradyne · 10 open roles · median 73 d
- Qualcomm · 8 open roles · median 45 d
- Microchip Technology · 6 open roles · median 96 d
- Analog Devices · 4 open roles · median 96 d
How we counted: 102 open FPGA Design (RTL Design) roles from 25 employers tracked in the SemiconductorJobs index, counted 21 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.