$100,000 - $500,000 USD yearly
Originally posted 5 October 2026 by the employer.
About the role
This role involves ensuring the correctness of high-performance RISC-V CPUs and AI compute platforms through formal methods.
What you'll do
- Use formal methods to prove complex hardware behavior and uncover corner cases.
- Develop properties, build formal verification environments, and analyze failures.
- Work closely with CPU architects, RTL designers, and other DV engineers to drive issues to closure.
What you'll need
- 6+ years of experience in design verification, formal verification, or related RTL verification for CPUs, SoCs, ASICs, or complex digital designs.
- Hands-on experience with formal verification methodologies and tools, including property checking, assertions, assumptions, constraints, and coverage analysis.
- Strong SystemVerilog skills, including experience writing and debugging SVA.
- Solid understanding of digital design and computer architecture; experience with CPU pipelines, caches, interfaces, control logic, or other complex microarchitecture.
- Strong programming and scripting skills in Python, Tcl, C/C++, or similar.
Skills: formal verification, SystemVerilog, SVA, CPU architecture, RTL verification
This role has been open 3 days — well below the 63-day median for Design Verification roles.
Design Verification · Design Verification
|
Open roles in category
1206
|
Median days open
63 d
|
Median salary
$187k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Tenstorrent | All employers we track in this specialty (1206 roles · 95 employers) |
|---|---|---|
| Open roles in this specialty | 13 | 1206 |
| Open roles in the wider Digital Design & Verification family | 30 | 3176 · 114 employers |
| Median days open | 134 d | 63 d (+71 d vs this employer) |
| Median salary (USD postings) | — | $187k |
Skills observed across this category: formal verification, SystemVerilog, SVA, CPU architecture, RTL verification
Who's hiring in this category
- Qualcomm · 111 open roles · median 42 d
- AMD · 102 open roles · median 49 d
- NVIDIA · 76 open roles · median 62 d
- Synopsys · 61 open roles · median 25 d
- SiFive · 55 open roles · median 66 d
- Micron Technology · 52 open roles · median 98 d
How we counted: 1206 open Design Verification (Design Verification) roles from 95 employers tracked in the SemiconductorJobs index, counted 9 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.