Formal Verification Engineer - Mountain View, CA, United States
$140,000 - $340,000 USD yearly
Originally posted 19 May 2026 by the employer.
About the role
MatX is seeking a Formal Verification Engineer to provide mathematical guarantees for hardware and software across the stack. The role spans hardware model checking of RTL blocks and memory subsystems as well as machine-checked proofs for compiler transformations using interactive theorem provers.
What you'll do
- Apply model checking and formal property verification to RTL blocks, memory subsystems, and interconnects using tools such as JasperGold or VC-Formal. - Develop and maintain machine-checked proofs for compiler transformations, verifying lowering passes from the high-level programming model to hardware. - Build embeddings of hardware description languages and simulator models into interactive theorem provers such as Lean 4, Rocq, or Isabelle/HOL to prove functional correctness and microarchitectural properties. - Collaborate with architecture, compiler, and silicon verification teams to define correctness properties and convert them into tractable proof obligations. - Drive methodology for integrating formal verification tools, including JasperGold and SymbiYosys, into engineering workflows.
What you'll need
- Hands-on experience with hardware model checking, including writing SVA/PSL properties, running bounded or unbounded proofs, and closing out formal verification targets at the block or subsystem level. - Practical experience with at least one interactive theorem prover such as Lean, Coq, Isabelle/HOL, or Agda. - Understanding across the hardware/software boundary, including both RTL microarchitecture and compiler IR design.
Skills: Formal Verification, model checking, RTL blocks, SVA/PSL properties, interactive theorem provers
This role has been open 157 days — well above the 64-day median for Design Verification roles.
Design Verification · Design Verification
|
Open roles in category
1254
|
Median days open
64 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | MatX | All employers we track in this specialty (1254 roles · 97 employers) |
|---|---|---|
| Open roles in this specialty | 11 | 1254 |
| Open roles in the wider Digital Design & Verification family | 30 | 3328 · 115 employers |
| Median days open | 64 d | 64 d (same as this employer) |
| Median salary (USD postings) | — | $185k |
Skills observed across this category: Formal Verification, model checking, RTL blocks, SVA/PSL properties, interactive theorem provers
Who's hiring in this category
- Qualcomm · 120 open roles · median 43 d
- AMD · 94 open roles · median 53 d
- NVIDIA · 84 open roles · median 65 d
- Synopsys · 67 open roles · median 39 d
- SiFive · 55 open roles · median 81 d
- Cadence Design Systems · 52 open roles · median 123 d
How we counted: 1254 open Design Verification (Design Verification) roles from 97 employers tracked in the SemiconductorJobs index, counted 24 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.