Analog & Mixed-Signal Design
Originally posted 22 February 2026 by the employer — open 200 days.
About the role
This role involves developing firmware for a multi-protocol high-speed SERDES up to 256Gbps.
What you'll do
- Develop firmware governing SERDES DSP and analog blocks.
- Implement and integrate signal-processing and communication algorithms.
- Support PHY bring-up, debugging, and system-level validation.
- Collaborate with analog, logic design, and system teams to ensure HW-FW integration.
What you'll need
- B.Sc. in Electrical Engineering or Computer Engineering.
- Strong background in signal processing and communication systems.
- 4+ years of hands-on embedded/firmware development (C/C++).
Skills: firmware development, SERDES, signal processing, high-speed communication, PHY bring-up, debug
Market context
This role has been open 175 days — well above the 91-day median for High-Speed IO/SerDes Design roles.
High-Speed IO/SerDes Design · Serdes Highspeed
|
Open roles in category
217
|
Median days open
91 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Altera | All employers we track in this specialty (217 roles · 44 employers) |
|---|---|---|
| Open roles in category | 5 | 217 |
| Median days open | 57 d | 91 d (−34 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Skills observed across this category: firmware development, SERDES, signal processing, high-speed communication, PHY bring-up, debug
Who's hiring in this category
- AMD · 24 open roles · median 61 d
- Cadence Design Systems · 19 open roles · median 153 d
- Qualcomm · 17 open roles · median 74 d
- Synopsys · 16 open roles · median 53 d
- Broadcom · 11 open roles · median 142 d
- NVIDIA · 10 open roles · median 95 d
How we counted: 217 open High-Speed IO/SerDes Design (Serdes Highspeed) roles from 44 employers tracked in the SemiconductorJobs index, counted 10 Sept 2026. Figures refresh nightly.