Failure Analysis Engineer - Server Systems Integration - NJ, Secaucus_Meadowlands, United States

Originally posted 11 September 2026 by the employer.

Own end-to-end failure analysis across hardware, firmware, silicon, and integration for Helios server platform bring-up.

About the role

This role involves owning end-to-end failure analysis across hardware, firmware, silicon, and integration for Helios server platform bring-up and system-level failures. It drives firmware-aware hardware debug across various components and determines the root cause of failures.

What you'll do

• Lead end-to-end failure analysis and root cause ownership for Helios server platform bring-up, factory, customer, and system-level failures.
• Own platform bring-up debug across BIOS, BMC, CPLD, PMBus, POST, PCIe enumeration, high-speed interconnect initialization, resets, clocks, power sequencing, and system configuration domains.
• Determine whether failures are caused by firmware behavior, hardware design, component quality, silicon behavior, power delivery, manufacturing process, configuration, or cross-domain interaction issues.
• Develop and execute structured debug plans using register dumps, firmware and BIOS logs, BMC event logs, telemetry, POST codes, diagnostic results, schematics, board layouts, oscilloscope captures, and logic analyzer traces.
• Automate debug data collection, log parsing, register analysis, and failure correlation using Python, Linux tools, scripting, and data analysis workflows.
• Create clear technical reports, executive summaries, debug timelines, and 8D-style documentation.

What you'll need

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or related discipline, or equivalent hands-on experience.
• Deep platform bring-up competency across BIOS, BMC, CPLD, PMBus, POST, PCIe enumeration, resets, clocks, power sequencing, register state, and high-speed interconnect initialization flows.
• Ability to isolate failures across firmware-controlled hardware behavior, silicon, motherboard/PDB design, power delivery, component quality, diagnostics, manufacturing process, and system configuration boundaries.
• Hands-on proficiency with oscilloscopes, logic analyzers, protocol analyzers, digital multimeters, power supplies, telemetry tools, register access utilities, and lab validation equipment.
• Experience analyzing register dumps, BIOS/BMC/FW logs, POST codes, event logs, telemetry streams, diagnostic outputs, schematic evidence, and electrical captures.
• Working knowledge of PCIe, high-speed interfaces, interconnect initialization, retimers, link training, signal path dependencies, and failure modes common to dense server platforms.

Nice to have

• Strong experience debugging server, hyperscale, GPU/accelerator, rack-scale, or comparable complex compute platforms through bring-up, validation, factory, or customer failure analysis phases.
• Experience using Python, shell scripting, Linux tools, SQL or data analysis methods to automate log parsing, register review, debug triage, and failure correlation.
• Ability to own technical interfaces and lead cross-functional RCA reviews with silicon, BIOS, BMC, firmware, validation, diagnostics, design, manufacturing, and supplier teams, driving corrective actions to closure.
• Experience with structured problem solving, 8D, platform bring-up debug, validation escapes, factory issue resolution, supplier quality, or customer failure analysis processes.
• Ability to understand firmware behavior and hardware control flows without being a pure firmware developer.