Factory Applications Engineer (Memory Test, San Jose)
$170,500 - $272,800 USD yearly
Originally posted 1 September 2026 by the employer.
About the role
This Factory Applications position supports advanced memory customers and influences the evolution of the Nextest test platform within the Memory Test Division.
What you'll do
- Drive customer engagements and technical escalations for advanced memory devices, including device bring-up, characterization, and yield ramp.
- Develop and deploy robust test program methodologies, characterization flows, and correlation strategies for memory products (Flash, DRAM) and protocol-based standards such as PCIe and UFS.
- Partner with Engineering, Marketing, and Product Management to provide customer-driven input into tester hardware and software roadmaps.
- Build technical demonstrations, documentation, and enablement materials to support customer evaluations and internal readiness.
- Act as a trusted technical interface for global customers during evaluation, production ramp, and mass production deployment.
- Drive timely resolution of critical customer issues through structured debug, root cause analysis, and scalable corrective actions.
What you'll need
- B.S. in Electrical Engineering or a related field, or equivalent experience
- 10+ years of experience in memory semiconductor ATE engineering
- Proven ability to develop, debug, and correlate memory test programs
- Strong understanding of wafer sort and final test methodologies
- Proficiency in C/C++ programming for test applications
- Strong hardware and software debugging capabilities
- Experience testing memory such as DRAM, FLASH, SRAM
- Hands-on experience testing memory protocols (PCIe, NVMe, UFS)
- Experience with Nextest Magnum and/or Advantest memory test platforms
- Experience supporting high-volume manufacturing test flows
- High-speed serial interface testing experience
- Experience working with global customers and managing technical escalations
- Prior involvement in customer evaluations, pre-sales support, or platform assessments
- Ability to travel up to 20% domestically and internationally, occasionally on short notice
- Authorization to work in the United States; position is not eligible for visa sponsorship
This role has been open 25 days — below the 27-day median for Silicon Test Engineering roles.
Silicon Test Engineering · DFT Test
|
Open roles in category
526
|
Median days open
27 d
|
Median salary
$169k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | Teradyne | All employers we track in this specialty (526 roles · 76 employers) |
|---|---|---|
| Open roles in this specialty | 68 | 526 |
| Open roles in the wider Silicon Validation & Test family | 85 | 2199 · 111 employers |
| Median days open | 25 d | 27 d (−2 d vs this employer) |
| Median salary (USD postings) | — | $169k |
Who's hiring in this category
- Teradyne (this employer) · 67 open roles · median 25 d
- Renesas Electronics · 41 open roles · median 25 d
- Infineon Technologies · 39 open roles · median 35 d
- Micron Technology · 28 open roles · median 34 d
- AMD · 26 open roles · median 40 d
- Qualcomm · 25 open roles · median 27 d
How we counted: 526 open Silicon Test Engineering (DFT Test) roles from 76 employers tracked in the SemiconductorJobs index, counted 13 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.