ESD Engineer - Edinburgh, Scotland, United Kingdom
Originally posted 19 June 2026 by the employer — open 82 days.
This role focuses on driving the development of the I/O library and defining chip- and IP-level ESD methodology.
About the role
The ESD Engineer will drive the development of the I/O library, leading the design, simulation, characterization, and validation of advanced I/O pad structures. This role involves defining and implementing chip- and IP-level ESD methodology.
What you'll do
- Design, simulate, and optimize advanced I/O circuits and ESD protection structures.
- Characterize and model I/O libraries to support high-performance mixed-signal design flows.
- Release, maintain, and improve I/O libraries and models used across multiple design teams.
- Apply expertise in ESD and latch-up requirements to ensure robust, reliable silicon.
- Drive ESD sign-off for both chip-level and block-level designs, ensuring consistent methodology.
- Act as a technical leader, unifying ESD, latch-up, and I/O strategies across business units.
What you'll need
- MSc in Electrical Engineering (or equivalent experience) with a strong track record in advanced circuit design.
- A holistic understanding of ESD/EOS protection for mixed-signal CMOS circuits.
- Strong fundamentals in ESD circuit design, layout, and testing.
- Proven experience in I/O design, including CMOS circuitry, latch-up mitigation, physical verification, and device-level characterization.
- Chip-level ESD signoff expertise and a deep understanding of reliability requirements.
- Ability to guide layout engineers, ensuring robust, ESD-safe layout implementation.
- Proficiency with Cadence schematic capture, layout, and simulation tools.
Nice to have
- Experience in IBIS model generation is a plus
Skills: ESD Engineer, I/O library, ESD protection devices, latch-up evaluation, mixed-signal CMOS ESD/EOS, Cadence schematic capture
This role has been open 82 days — well above the 66-day median for Analog IC Design roles.
Analog IC Design · Analog Design
|
Open roles in category
259
|
Median days open
66 d
|
Median salary
$156k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Cirrus Logic | All employers we track in this specialty (259 roles · 46 employers) |
|---|---|---|
| Open roles in category | 9 | 259 |
| Median days open | 112 d | 66 d (+46 d vs this employer) |
| Median salary (USD postings) | — | $156k |
Skills observed across this category: ESD Engineer, I/O library, ESD protection devices, latch-up evaluation, mixed-signal CMOS ESD/EOS, Cadence schematic capture
Who's hiring in this category
- Micron Technology · 33 open roles · median 45 d
- Texas Instruments · 30 open roles · median 111 d
- NXP Semiconductors · 15 open roles · median 65 d
- Renesas Electronics · 14 open roles · median 53 d
- onsemi · 13 open roles · median 111 d
- Semtech · 11 open roles · median 83 d
How we counted: 259 open Analog IC Design (Analog Design) roles from 46 employers tracked in the SemiconductorJobs index, counted 10 Sept 2026. Figures refresh nightly.