EMIR Engineer - CA, Santa Clara, United States
Originally posted 12 October 2026 by the employer.
Develop and maintain EMIR/Voltus flows for 3DIC Stacked Die design teams.
About the role
As a senior EMIR CAD member, you will be responsible for Gatelevel EMIR, and the development and maintenance of EMIR/Voltus flows. You will provide tools/flows support to global IP, SoC, and 3DIC Stacked Die design teams.
What you'll do
- Collaborate with the EMIR CAD team to develop and maintain EMIR flows using Voltus and Redhawk_SC.
- Provide tools/flows support to global IP/SoC/3DIC design teams and enable the flow to support new tech nodes.
- Collaborate with internal EMIR experts and EDA vendors to drive continuous flow and methodology improvements.
- Work with EDA vendors to resolve tool issues and bugs.
- Manage tool versions regression and qualification for deployment.
What you'll need
- Extensive industrial experience in VLS/silicon design.
- Technically strong in EMIR/Voltus with knowledge in Physical Design and Advanced Packaging.
- Exceptional scripting skills in Perl, Tcl, and Python.
- Solid background in VLSI and CMOS fundamentals and electrical engineering knowledge.
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related discipline.
Nice to have
- Prior experience working with EDA vendors, particularly in Gatelevel EMIR domain (with Voltus/Redhawk_SC experience).
- Master's degree.
Skills: EMIR, Voltus, EDA vendors, 3DIC Stacked Die, flow development
This role has been open 2 days — well below the 78-day median for EDA/CAD Engineering roles.
EDA/CAD Engineering · EDA Tools
|
Open roles in category
688
|
Median days open
78 d
|
Median salary
$195k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | AMD | All employers we track in this specialty (688 roles · 74 employers) |
|---|---|---|
| Open roles in this specialty | 23 | 688 |
| Open roles in the wider Physical Implementation family | 85 | 1470 · 108 employers |
| Median days open | 16 d | 78 d (−62 d vs this employer) |
| Median salary (USD postings) | — | $195k |
Skills observed across this category: EMIR, Voltus, EDA vendors, 3DIC Stacked Die, flow development
Who's hiring in this category
- Cadence Design Systems · 153 open roles · median 168 d
- Synopsys · 65 open roles · median 38 d
- Micron Technology · 44 open roles · median 80 d
- Qualcomm · 41 open roles · median 66 d
- NVIDIA · 39 open roles · median 79 d
- GlobalFoundries · 33 open roles · median 35 d
How we counted: 688 open EDA/CAD Engineering (EDA Tools) roles from 74 employers tracked in the SemiconductorJobs index, counted 15 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Physical Implementation family row. Figures refresh nightly.