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Synopsys

Embedded Memory Design Manager ---17876

Synopsys img src="https://tbcdn.talentbrew.com/company/44408/gst_v1/img/icon-map-black.png" height="15" width="15" alt="pin icon">Da Nang, Vietnam 3 months ago
Digital Design & SoC Architecture

Originally posted 29 June 2026 by the employer.

About the role

This role involves leading the architecture, circuit design, and physical implementation of embedded memory IP. The focus is on memory design work for chips powering AI accelerators to automotive systems.

What you'll do

  • Lead architecture, circuit design, and physical implementation of embedded memory IP including SRAM, register files, TCAM, and ROM across advanced nodes.
  • Define block specifications with system architects, translating customer requirements into concrete design targets.
  • Manage circuit and layout engineers, assign work packages, track progress, and coordinate with project management.
  • Execute design and layout reviews, create documentation including datasheets and design reports.
  • Model and simulate memory blocks using VerilogA and SystemVerilog to validate architecture before tapeout.
  • Support silicon evaluation, analyze field issues, and drive root cause analysis when designs fail.

What you'll need

  • Bachelor's or Master's in Electrical Engineering, Computer Science, or equivalent.
  • 10+ years in full embedded memory design flow: architecture, circuit design, physical implementation, compiler automation, characterization, timing, and model generation.
  • Deep expertise in SRAM, register file, TCAM, and ROM architectures with advanced custom circuit implementations.
  • Direct experience designing memory IP in advanced nodes (7nm, 5nm, or beyond) with variation-aware design understanding.
  • Strong knowledge of digital design, verification methodologies, ASIC design flow, and industry-standard EDA tools.
  • Experience managing engineering teams including task delegation, performance management, and technical mentorship.

Skills: embedded memory, SRAM, circuit design, transistor-level, advanced nodes, VerilogA

Market context

This role has been open 97 days — well above the 69-day median for Memory Design roles.

Memory Design · Memory Design

Open roles in category
287
Median days open
69 d
Median salary
$205k
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
How Synopsys compares in Memory Design hiring
Metric Synopsys All employers we track in this specialty (287 roles · 29 employers)
Open roles in this specialty 27 287
Median days open 49 d 69 d (−20 d vs this employer)
Median salary (USD postings) — $205k

Skills observed across this category: embedded memory, SRAM, circuit design, transistor-level, advanced nodes, VerilogA

Who's hiring in this category

  • Micron Technology · 151 open roles · median 86 d
  • Synopsys (this employer) · 27 open roles · median 49 d
  • SanDisk · 17 open roles · median 32 d
  • Broadcom · 16 open roles · median 50 d
  • Qualcomm · 12 open roles · median 149 d
  • NVIDIA · 7 open roles · median 59 d

How we counted: 287 open Memory Design (Memory Design) roles from 29 employers tracked in the SemiconductorJobs index, counted 5 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.

Synopsys

Synopsys

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img src="https://tbcdn.talentbrew.com/company/44408/gst_v1/img/icon-map-black.png" height="15" width="15" alt="pin icon">Da Nang, Vietnam
On-site
3 months ago

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