DSP Systems Engineer, Staff - Toronto, Ontario, Canada
$110,500 - $160,500 USD yearly
Originally posted 5 August 2026 by the employer.
This role focuses on DSP engines for PCIe, 112G and 224G SerDes solutions.
About the role
This Staff DSP Systems Engineer role involves contributing to algorithm development, model building, diagnostic tooling, and silicon validation for high-speed SerDes problems. You will be working on DSP engines that power PCIe, 112G and 224G SerDes solutions.
What you'll do
- Design and refine high-speed DSP SerDes features and architectures in collaboration with RTL/Firmware designers.
- Develop and maintain bit-accurate and cycle-accurate MATLAB models for RTL verification, pre-silicon performance estimation, and post-silicon correlation.
- Research and analyze DSP algorithms addressing power, performance, and area trade-offs across equalization, LMS adaptation, CDR, noise mitigation, and linearity.
- Develop and analyze DSP diagnostic features and performance metrics, including SNR, eye monitoring, BER floor, linearity, and jitter.
- Partner with Firmware, DV, and Post-Silicon teams by providing theory of operation documentation, pseudocode, and DSP sequences.
What you'll need
- Strong proficiency in MATLAB, Python, and C/C++.
- Solid RTL and digital design fundamentals, including driving simulations, code reviews, and debugging failures.
- Proven DSP architecture experience in mixed-signal SerDes, including adaptation/calibration, clocking, equalization, and FEC.
- Skilled in developing DSP diagnostic tools and analyzing performance metrics: BER, SNR, jitter, eye characterization.
- Solid grasp of post-silicon debug, voltage/temperature effects on performance, analog continuous-time circuits, ADCs, and noise/transfer function analysis.
Nice to have
- 8 years of experience, or Bachelor's with 10 years of relevant experience.
- Hands-on experience with DSP-based PCIe, 112G, 224G, or higher-speed SerDes architectures shipping in real products.
Skills: DSP SerDes, high-speed signal processing, MATLAB models, equalization, LMS adaptation, CDR, PCIe, 112G, 224G
This role has been open 53 days — well below the 76-day median for High-Speed IO/SerDes Design roles.
High-Speed IO/SerDes Design · Serdes Highspeed
|
Open roles in category
239
|
Median days open
76 d
|
Median salary
$177k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Qualcomm | All employers we track in this specialty (239 roles · 49 employers) |
|---|---|---|
| Open roles in this specialty | 20 | 239 |
| Open roles in the wider Analog & Mixed-Signal family | 75 | 1385 · 107 employers |
| Median days open | 58 d | 76 d (−18 d vs this employer) |
| Median salary (USD postings) | — | $177k |
Skills observed across this category: DSP SerDes, high-speed signal processing, MATLAB models, equalization, LMS adaptation, CDR
Who's hiring in this category
- AMD · 28 open roles · median 64 d
- Synopsys · 26 open roles · median 44 d
- Qualcomm (this employer) · 20 open roles · median 58 d
- Cadence Design Systems · 18 open roles · median 181 d
- Apple · 12 open roles · median 7 d
- NVIDIA · 11 open roles · median 116 d
How we counted: 239 open High-Speed IO/SerDes Design (Serdes Highspeed) roles from 49 employers tracked in the SemiconductorJobs index, counted 30 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Analog & Mixed-Signal family row. Figures refresh nightly.