$256,000 - $402,500 USD yearly
Originally posted 25 October 2026 by the employer.
Coordinate memory and storage technology partners across HBM, DDR5, LPDDR, and CXL architectures.
About the role
This role coordinates memory and storage technology partners to ensure partner advancements match product schedules across Datacenter, Automotive, Embedded, and GPU platforms. You will align supplier roadmaps across DRAM and storage standards with internal architecture cadences.
What you'll do
- Lead technical engagement with memory and storage suppliers to align roadmaps, product planning, and technology development. - Drive HBM, LPDDR/SOCAMM, GDDR, and DDR5 roadmap alignment to match platform cadences. - Define performance, power, thermal, reliability, and endurance specifications for partner components. - Represent technical requirements in standards development organizations such as JEDEC, eSSD, UFS, and eMMC. - Evaluate emerging technologies including CXL memory expansion and enterprise SSDs, and recommend adoption strategies. - Author technical whitepapers, presentations, and executive briefings articulating memory and storage strategy.
What you'll need
- 15+ overall years of developing or integrating memory architectures in semiconductor projects. - 8+ years of management or leadership experience. - Deep understanding of memory technologies. - Bachelors in Electrical Engineering, Computer Science, or equivalent experience. - Demonstrated ability to author technical original content and adjust communication to the technical level of the audience.
Skills: technical marketing, DRAM, HBM, JEDEC, storage