Director, System Level Testing - Product Development Engineering - CA, Santa Clara, United States
$272,000 - $425,500 USD yearly
Originally posted 28 August 2026 by the employer.
Lead system level testing for AI, data center, SOC, and Tegra Automotive product lines.
About the role
This role leads end-to-end post-silicon validation, test architecture, and manufacturing ramp for AI, data center, SOC, and Tegra Automotive product lines. You will guide a team responsible for bringing GPU, SOC, LPU, and Auto/Tegra technologies from design validation through manufacturing ramp and high-volume production.
What you'll do
- Lead and mentor a team of product development engineers responsible for validation, characterization, and production ramp.
- Drive product development strategy from early silicon validation through qualification and high-volume manufacturing.
- Develop and implement validation methodologies and test strategies for mixed-signal silicon designs.
- Oversee product characterization of new integrated circuit designs.
- Lead root-cause analysis and complex problem resolution related to silicon performance, yield excursions, and product reliability.
- Drive yield improvement initiatives, test time reduction, and manufacturing efficiency across wafer and module test flows.
What you'll need
- Master’s or Ph.D. in Electrical Engineering, Physics, Computer Engineering, or a related field, or equivalent experience.
- 15+ years of background in semiconductor product development, testing or manufacturing engineering, including leading large, cross-functional technical teams.
- 5+ years of Director leadership or management experience leading engineering teams.
- Strong understanding of CMOS, Component characterization, and analog/mixed-signal circuit behavior.
- Experience with high-speed testing and characterization.
- Proven experience in yield analysis, product characterization, and silicon debug.
Skills: system level testing, yield improvement, test optimization, product characterization, silicon debug
This role has been open 46 days — below the 55-day median for Product Engineering roles.
Product Engineering · Silicon Validation
|
Open roles in category
38
|
Median days open
55 d
|
Median salary
—
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | NVIDIA | All employers we track in this specialty (38 roles · 18 employers) |
|---|---|---|
| Open roles in this specialty | 5 | 38 |
| Open roles in the wider Silicon Validation & Test family | 94 | 2223 · 112 employers |
| Median days open | 26 d | 55 d (−29 d vs this employer) |
| Median salary (USD postings) | — | — |
Skills observed across this category: system level testing, yield improvement, test optimization, product characterization, silicon debug
Who's hiring in this category
- AMD · 7 open roles · median 55 d
- NVIDIA (this employer) · 5 open roles · median 27 d
- Qualcomm · 4 open roles · median 51 d
- onsemi · 3 open roles · median 126 d
- Arm Holdings · 2 open roles · median 84 d
- Microchip Technology · 2 open roles · median 158 d
How we counted: 38 open Product Engineering (Silicon Validation) roles from 18 employers tracked in the SemiconductorJobs index, counted 15 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.